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* [PATCH 0/2] *** SUBJECT HERE ***
@ 2022-09-02  1:58 sieu.mun.tang
  2022-09-02  1:58 ` [PATCH 1/2] arch: arm: mach-socfpga: Use custom header target buffer in SPL sieu.mun.tang
  2022-09-02  1:58 ` [PATCH 2/2] arch: arm: mach-socfpga: Add SPL fitImage config match sieu.mun.tang
  0 siblings, 2 replies; 3+ messages in thread
From: sieu.mun.tang @ 2022-09-02  1:58 UTC (permalink / raw)
  To: u-boot
  Cc: Jagan Teki, Vignesh R, Marek, Simon, Kris, Tien Fong, Kok Kiang,
	Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
	Hazim, Jit Loon Lim, Sieu Mun Tang

From: Sieu Mun Tang <sieu.mun.tang@intel.com>

*** BLURB HERE ***

Tien Fong Chee (2):
  arch: arm: mach-socfpga: Use custom header target buffer in SPL
  arch: arm: mach-socfpga: Add SPL fitImage config match

 arch/arm/mach-socfpga/spl_a10.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

-- 
2.25.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH 1/2] arch: arm: mach-socfpga: Use custom header target buffer in SPL
  2022-09-02  1:58 [PATCH 0/2] *** SUBJECT HERE *** sieu.mun.tang
@ 2022-09-02  1:58 ` sieu.mun.tang
  2022-09-02  1:58 ` [PATCH 2/2] arch: arm: mach-socfpga: Add SPL fitImage config match sieu.mun.tang
  1 sibling, 0 replies; 3+ messages in thread
From: sieu.mun.tang @ 2022-09-02  1:58 UTC (permalink / raw)
  To: u-boot
  Cc: Jagan Teki, Vignesh R, Marek, Simon, Kris, Tien Fong, Kok Kiang,
	Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
	Hazim, Jit Loon Lim, Sieu Mun Tang

From: Tien Fong Chee <tien.fong.chee@intel.com>

Allocate buffer from bottom half of DDR for the image headers in SPL on
Arria10. This allows SPL to load the fitImage header, parse it,
extract the FPGA core bitstream section from it, and program the FPGA.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
---
 arch/arm/mach-socfpga/spl_a10.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index ec67a5b0eb..bfcbd1dfe1 100644
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -28,6 +28,8 @@
 #include <watchdog.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/fpga_manager.h>
+#include <exports.h>
+#include <log.h>
 #include <mmc.h>
 #include <memalign.h>
 #include <linux/delay.h>
@@ -281,3 +283,13 @@ void spl_board_prepare_for_boot(void)
 	writel(FSBL_IMAGE_IS_VALID, socfpga_get_sysmgr_addr() +
 	       SYSMGR_A10_ROMCODE_INITSWSTATE);
 }
+
+#if defined(CONFIG_SPL_LOAD_FIT) && defined(CONFIG_SPL_SPI_LOAD)
+struct image_header *spl_get_load_buffer(int offset, size_t size)
+{
+	if (gd->ram_size)
+		return (struct image_header *)(gd->ram_size / 2);
+	else
+		return NULL;
+}
+#endif
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH 2/2] arch: arm: mach-socfpga: Add SPL fitImage config match
  2022-09-02  1:58 [PATCH 0/2] *** SUBJECT HERE *** sieu.mun.tang
  2022-09-02  1:58 ` [PATCH 1/2] arch: arm: mach-socfpga: Use custom header target buffer in SPL sieu.mun.tang
@ 2022-09-02  1:58 ` sieu.mun.tang
  1 sibling, 0 replies; 3+ messages in thread
From: sieu.mun.tang @ 2022-09-02  1:58 UTC (permalink / raw)
  To: u-boot
  Cc: Jagan Teki, Vignesh R, Marek, Simon, Kris, Tien Fong, Kok Kiang,
	Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
	Hazim, Jit Loon Lim, Sieu Mun Tang

From: Tien Fong Chee <tien.fong.chee@intel.com>

Add empty SPL fitImage configuration match. This can be extended
if there is ever need to support multiple boards with single SFP
image.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
---
 arch/arm/mach-socfpga/spl_a10.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index bfcbd1dfe1..64f801dfe5 100644
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -292,4 +292,12 @@ struct image_header *spl_get_load_buffer(int offset, size_t size)
 	else
 		return NULL;
 }
+
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
+
+	return 0;
+}
 #endif
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2022-09-02  1:58 UTC | newest]

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