From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BC75BECAAD2 for ; Fri, 2 Sep 2022 03:24:08 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3D39C845D8; Fri, 2 Sep 2022 05:24:06 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="gJhnI6y8"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id EF9EB84A09; Fri, 2 Sep 2022 05:24:04 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 92CDD840B1 for ; Fri, 2 Sep 2022 05:24:01 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=jitloonl@ecsmtp.png.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662089041; x=1693625041; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=/cd+ZiyMX3GlY9N+4uomaWk7aoc6X7OQ9eiBKyrd64M=; b=gJhnI6y8Xix1MuI9khnU4MUkQv9WoAOTr1ewoZ9v5+5Ni9JpGMCSKPKb Lv8HNeKhYc02dkogtoFZedp+kJ8u4zNLM6byjJQBz7garcpN/eKKSHbwt bj7BViEMYrlToLuvIiK3xFrIyQ3nDAEFIKWHixSOsxhM8LQSE1WYyCCb0 0x9JshCVLYZZXp7DW6ZylOuQuJcE+icKFwSWN9NEKgKzVLaxT66YU4rXK TCgtekTt4HPQ5x4q4xUevDVPvyOJBnrFHVoD7JF1b7+TPbvZ+7KH+/8SL wsrgQyAGc3FqraR07Tomw6i6NjqoOHRy+odGP27zBu7IM2GJqjrjZG8xE A==; X-IronPort-AV: E=McAfee;i="6500,9779,10457"; a="275627959" X-IronPort-AV: E=Sophos;i="5.93,281,1654585200"; d="scan'208";a="275627959" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Sep 2022 20:23:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,281,1654585200"; d="scan'208";a="788512321" Received: from pglmail07.png.intel.com ([10.221.193.207]) by orsmga005.jf.intel.com with ESMTP; 01 Sep 2022 20:23:55 -0700 Received: from localhost (pgli0117.png.intel.com [10.221.240.80]) by pglmail07.png.intel.com (Postfix) with ESMTP id 81CC432E9; Fri, 2 Sep 2022 11:23:54 +0800 (+08) Received: by localhost (Postfix, from userid 12048045) id 7C4F63D21; Fri, 2 Sep 2022 11:23:54 +0800 (+08) From: Jit Loon Lim To: u-boot@lists.denx.de Cc: Jagan Teki , Vignesh R , Marek , Simon , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Sieu Mun Tang , Jit Loon Lim Subject: [PATCH] arm: socfpga: Ensure the DTS QSPI clock is set correctly Date: Fri, 2 Sep 2022 11:23:53 +0800 Message-Id: <20220902032353.29280-1-jit.loon.lim@intel.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Tien Fong Chee The clocking section of Linux device tree was changed between 4.9.78-ltsi and 4.14.73-ltsi. This patch ensures that QSPI clock can be set correctly despite of different clocking section location in both Linux 4.9.78-ltsi and 4.14.73-ltsi. Signed-off-by: Tien Fong Chee Signed-off-by: Jit Loon Lim --- include/configs/socfpga_soc64_common.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 06198ddd82..14506ac2b2 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -57,8 +57,10 @@ "echo Enabling QSPI at Linux DTB...;" \ "fdt addr ${fdt_addr}; fdt resize;" \ "fdt set /soc/spi@ff8d2000 status okay;" \ - "fdt set /soc/clkmgr/clocks/qspi_clk clock-frequency " \ - " ${qspi_clock}; fi; \0" \ + "if fdt set /soc/clocks/qspi-clk clock-frequency" \ + " ${qspi_clock}; then" \ + " else fdt set /soc/clkmgr/clocks/qspi_clk clock-frequency" \ + " ${qspi_clock}; fi; fi\0" \ "scriptaddr=0x02100000\0" \ "scriptfile=u-boot.scr\0" \ "fatscript=if fatload mmc 0:1 ${scriptaddr} ${scriptfile};" \ -- 2.26.2