* [PATCH] arm: Enable cache-pl310 driver build for both SPL and proper U-Boot
@ 2022-09-05 12:55 Jit Loon Lim
0 siblings, 0 replies; only message in thread
From: Jit Loon Lim @ 2022-09-05 12:55 UTC (permalink / raw)
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Sieu Mun Tang, Jit Loon Lim
From: Tien Fong Chee <tien.fong.chee@intel.com>
Moved CONFIG_SYS_L2_PL310 to the location where the build on the
cache-pl310 can be taken in both SPL and proper U-Boot. This driver is
required for SoCFPGA when temporarily turning on the cache for better
performance in initializing whole DDR to zero.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
arch/arm/lib/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index c603fe61bc..575042e6df 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -43,6 +43,7 @@ ifdef CONFIG_ARM64
obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset-arm64.o
obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy-arm64.o
else
+obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o
obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o
endif
--
2.26.2
^ permalink raw reply related [flat|nested] only message in thread
only message in thread, other threads:[~2022-09-05 12:55 UTC | newest]
Thread overview: (only message) (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-09-05 12:55 [PATCH] arm: Enable cache-pl310 driver build for both SPL and proper U-Boot Jit Loon Lim
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox