* [PATCH 2/7] configs: HSD #1507526426-3: configs: socfpga: agilex: Move MTDIDS_DEFAULT to defconfig
2022-09-11 11:47 [PATCH 1/7] configs: HSD #1507526426-2: configs: socfpga: agilex: Enable CONFIG_CMD_MTD Jit Loon Lim
@ 2022-09-11 11:47 ` Jit Loon Lim
2022-09-11 11:47 ` [PATCH 3/7] arch: arm: dts: HSD #1507526426-6: arm: dts: socfpga: Add NAND support for Agilex Jit Loon Lim
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Jit Loon Lim @ 2022-09-11 11:47 UTC (permalink / raw)
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Jit Loon Lim, Sieu Mun Tang, Ley Foon Tan
From: Ley Foon Tan <ley.foon.tan@intel.com>
Move MTDIDS_DEFAULT to defconfig and add mtdids to ENV settings.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
configs/socfpga_agilex_atf_defconfig | 1 +
configs/socfpga_agilex_defconfig | 1 +
...efconfig => socfpga_agilex_qspi_defconfig} | 54 +++++++------------
include/configs/socfpga_soc64_common.h | 1 +
4 files changed, 22 insertions(+), 35 deletions(-)
copy configs/{socfpga_agilex_defconfig => socfpga_agilex_qspi_defconfig} (51%)
diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig
index c7b203fece..088d95cd4e 100644
--- a/configs/socfpga_agilex_atf_defconfig
+++ b/configs/socfpga_agilex_atf_defconfig
@@ -63,6 +63,7 @@ CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="kernel.itb"
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig
index bd6360a0a4..7ecb9f0974 100644
--- a/configs/socfpga_agilex_defconfig
+++ b/configs/socfpga_agilex_defconfig
@@ -57,6 +57,7 @@ CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="Image"
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_qspi_defconfig
similarity index 51%
copy from configs/socfpga_agilex_defconfig
copy to configs/socfpga_agilex_qspi_defconfig
index bd6360a0a4..bcf697caeb 100644
--- a/configs/socfpga_agilex_defconfig
+++ b/configs/socfpga_agilex_qspi_defconfig
@@ -1,52 +1,36 @@
CONFIG_ARM=y
-CONFIG_COUNTER_FREQUENCY=400000000
+CONFIG_ARM_SMCCC=y
+CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
CONFIG_ARCH_SOCFPGA=y
CONFIG_SYS_TEXT_BASE=0x1000
-CONFIG_SYS_MALLOC_LEN=0x500000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_OFFSET=0x200
+CONFIG_ENV_OFFSET=0x02080000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk"
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
# CONFIG_PSCI_RESET is not set
-CONFIG_SYS_LOAD_ADDR=0x02000000
-CONFIG_SYS_MEMTEST_START=0x00000000
-CONFIG_SYS_MEMTEST_END=0x3fe00000
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000
-CONFIG_REMAKE_ELF=y
+CONFIG_ARMV8_PSCI=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk_qspi"
+CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="earlycon"
+CONFIG_BOOTARGS="earlycon panic=-1"
CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot"
-CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3ff00000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK=0xffe3f000
-CONFIG_SYS_SPL_MALLOC=y
-CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
-CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000
-CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
+CONFIG_BOOTCOMMAND="sf probe;run qspiload;run linux_qspi_enable;rsu dtb;run qspiboot"
CONFIG_SPL_CACHE=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000
-CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2082
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@@ -57,16 +41,17 @@ CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_USE_BOOTFILE=y
-CONFIG_BOOTFILE="Image"
+CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_BLK=y
CONFIG_SPL_ALTERA_SDRAM=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
-CONFIG_MMC_DW=y
+# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_SF_DEFAULT_MODE=0x2003
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -80,9 +65,8 @@ CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y
-CONFIG_DESIGNWARE_WATCHDOG=y
-CONFIG_WDT=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
-CONFIG_PANIC_HANG=y
+CONFIG_PANIC_HANG=y
\ No newline at end of file
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index 06198ddd82..e8175926a3 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -53,6 +53,7 @@
"bootm ${loadaddr}\0" \
"mmcfitload=mmc rescan;" \
"load mmc 0:1 ${loadaddr} ${bootfile}\0" \
+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
"linux_qspi_enable=if sf probe; then " \
"echo Enabling QSPI at Linux DTB...;" \
"fdt addr ${fdt_addr}; fdt resize;" \
--
2.26.2
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/7] arch: arm: dts: HSD #1507526426-6: arm: dts: socfpga: Add NAND support for Agilex
2022-09-11 11:47 [PATCH 1/7] configs: HSD #1507526426-2: configs: socfpga: agilex: Enable CONFIG_CMD_MTD Jit Loon Lim
2022-09-11 11:47 ` [PATCH 2/7] configs: HSD #1507526426-3: configs: socfpga: agilex: Move MTDIDS_DEFAULT to defconfig Jit Loon Lim
@ 2022-09-11 11:47 ` Jit Loon Lim
2022-09-11 11:47 ` [PATCH 4/7] configs: HSD #1507526426-7: configs: socfpga: agilex: Add NAND support Jit Loon Lim
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Jit Loon Lim @ 2022-09-11 11:47 UTC (permalink / raw)
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Jit Loon Lim, Sieu Mun Tang, Ley Foon Tan
From: Ley Foon Tan <ley.foon.tan@intel.com>
Add NAND daughter card support, it has the following peripherals::
- NAND
- GMAC2
- I2C2
- UART0
Note, no SDMMC on NAND daughter card.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/socfpga_agilex.dtsi | 3 +
arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 +
arch/arm/dts/socfpga_agilex_socdk_nand.dts | 88 +++++++++++++++++++
4 files changed, 96 insertions(+)
create mode 100644 arch/arm/dts/socfpga_agilex_socdk_nand.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ceaa39e4b4..34a2f4645b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -419,6 +419,7 @@ dtb-$(CONFIG_TARGET_THUNDERX_88XX) += thunderx-88xx.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_agilex_socdk.dtb \
+ socfpga_agilex_socdk_nand.dtb \
socfpga_arria5_secu1.dtb \
socfpga_arria5_socdk.dtb \
socfpga_arria10_chameleonv3_270_3.dtb \
diff --git a/arch/arm/dts/socfpga_agilex.dtsi b/arch/arm/dts/socfpga_agilex.dtsi
index c3ead2d72b..bd7f0c4182 100644
--- a/arch/arm/dts/socfpga_agilex.dtsi
+++ b/arch/arm/dts/socfpga_agilex.dtsi
@@ -308,6 +308,9 @@
<0xffb80000 0x1000>;
reg-names = "nand_data", "denali_reg";
interrupts = <0 97 4>;
+ clocks = <&clkmgr AGILEX_NAND_CLK>,
+ <&clkmgr AGILEX_NAND_X_CLK>;
+ clock-names = "nand", "nand_x";
resets = <&rst NAND_RESET>, <&rst NAND_OCP_RESET>;
status = "disabled";
};
diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
index 2400fad18a..56eb38d02c 100644
--- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
@@ -40,6 +40,10 @@
status = "okay";
};
+&nand {
+ u-boot,dm-pre-reloc;
+};
+
&mmc {
drvsel = <3>;
smplsel = <0>;
diff --git a/arch/arm/dts/socfpga_agilex_socdk_nand.dts b/arch/arm/dts/socfpga_agilex_socdk_nand.dts
new file mode 100644
index 0000000000..556a7b407d
--- /dev/null
+++ b/arch/arm/dts/socfpga_agilex_socdk_nand.dts
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation
+ */
+
+#include "socfpga_agilex_socdk.dts"
+#include "socfpga_agilex_socdk-u-boot.dtsi"
+
+/ {
+ chosen {
+ u-boot,boot0 = <&nand>;
+ };
+};
+
+&gmac0 {
+ status = "disabled";
+};
+
+&gmac2 {
+ status = "okay";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+
+ max-frame-size = <3800>;
+
+ mdio2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy2: ethernet-phy@2 {
+ reg = <4>;
+
+ txd0-skew-ps = <0>; /* -420ps */
+ txd1-skew-ps = <0>; /* -420ps */
+ txd2-skew-ps = <0>; /* -420ps */
+ txd3-skew-ps = <0>; /* -420ps */
+ rxd0-skew-ps = <420>; /* 0ps */
+ rxd1-skew-ps = <420>; /* 0ps */
+ rxd2-skew-ps = <420>; /* 0ps */
+ rxd3-skew-ps = <420>; /* 0ps */
+ txen-skew-ps = <0>; /* -420ps */
+ txc-skew-ps = <1860>; /* 960ps */
+ rxdv-skew-ps = <420>; /* 0ps */
+ rxc-skew-ps = <1680>; /* 780ps */
+ };
+ };
+};
+
+&mmc {
+ status = "disabled";
+};
+
+&nand {
+ status = "okay";
+ nand-bus-width = <16>;
+
+ flash@0 {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "u-boot";
+ reg = <0 0x200000>;
+ };
+ partition@200000 {
+ label = "env";
+ reg = <0x200000 0x40000>;
+ };
+ partition@240000 {
+ label = "dtb";
+ reg = <0x240000 0x40000>;
+ };
+ partition@280000 {
+ label = "kernel";
+ reg = <0x280000 0x2000000>;
+ };
+ partition@2280000 {
+ label = "misc";
+ reg = <0x2280000 0x2000000>;
+ };
+ partition@4280000 {
+ label = "rootfs";
+ reg = <0x4280000 0x3bd0000>;
+ };
+ };
+ };
+};
\ No newline at end of file
--
2.26.2
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 4/7] configs: HSD #1507526426-7: configs: socfpga: agilex: Add NAND support
2022-09-11 11:47 [PATCH 1/7] configs: HSD #1507526426-2: configs: socfpga: agilex: Enable CONFIG_CMD_MTD Jit Loon Lim
2022-09-11 11:47 ` [PATCH 2/7] configs: HSD #1507526426-3: configs: socfpga: agilex: Move MTDIDS_DEFAULT to defconfig Jit Loon Lim
2022-09-11 11:47 ` [PATCH 3/7] arch: arm: dts: HSD #1507526426-6: arm: dts: socfpga: Add NAND support for Agilex Jit Loon Lim
@ 2022-09-11 11:47 ` Jit Loon Lim
2022-09-11 11:47 ` [PATCH 5/7] configs: HSD #1507526426-8: configs: socfpga: Add Nand defconfig for Agilex Jit Loon Lim
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Jit Loon Lim @ 2022-09-11 11:47 UTC (permalink / raw)
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Jit Loon Lim, Sieu Mun Tang, Ley Foon Tan
From: Ley Foon Tan <ley.foon.tan@intel.com>
Add NAND related CONFIGs.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
include/configs/socfpga_soc64_common.h | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index e8175926a3..38c77f2f4d 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -33,6 +33,28 @@
* U-Boot environment configurations
*/
+ /*
+ * NAND support
+ */
+#ifdef CONFIG_NAND_DENALI
+#define CONFIG_SPL_NAND_RAW_ONLY
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+
+#define CONFIG_SYS_NAND_U_BOOT_SIZE (1 * 1024 * 1024)
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+
+/* Environment for NAND boot */
+#if defined(CONFIG_ENV_IS_IN_NAND)
+#undef CONFIG_ENV_OFFSET
+#undef CONFIG_ENV_SIZE
+#define CONFIG_ENV_OFFSET 0x00200000
+#define CONFIG_ENV_SIZE (128 * 1024)
+#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
+#endif
+#endif /* CONFIG_NAND_DENALI */
+
/*
* Environment variable
*/
@@ -54,6 +76,7 @@
"mmcfitload=mmc rescan;" \
"load mmc 0:1 ${loadaddr} ${bootfile}\0" \
"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
"linux_qspi_enable=if sf probe; then " \
"echo Enabling QSPI at Linux DTB...;" \
"fdt addr ${fdt_addr}; fdt resize;" \
--
2.26.2
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 5/7] configs: HSD #1507526426-8: configs: socfpga: Add Nand defconfig for Agilex
2022-09-11 11:47 [PATCH 1/7] configs: HSD #1507526426-2: configs: socfpga: agilex: Enable CONFIG_CMD_MTD Jit Loon Lim
` (2 preceding siblings ...)
2022-09-11 11:47 ` [PATCH 4/7] configs: HSD #1507526426-7: configs: socfpga: agilex: Add NAND support Jit Loon Lim
@ 2022-09-11 11:47 ` Jit Loon Lim
2022-09-11 11:47 ` [PATCH 6/7] arch: arm: dts: HSD #1507526426-9: arm: dts: agilex: Fix incorrect rootfs partition size for NAND Jit Loon Lim
2022-09-11 11:47 ` [PATCH 7/7] configs: HSD #1507526426-10: configs: socfpga: agilex: Add NAND boot support Jit Loon Lim
5 siblings, 0 replies; 7+ messages in thread
From: Jit Loon Lim @ 2022-09-11 11:47 UTC (permalink / raw)
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Jit Loon Lim, Sieu Mun Tang, Ley Foon Tan
From: Ley Foon Tan <ley.foon.tan@intel.com>
Add Nand defconfig for Agilex.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
configs/socfpga_agilex_nand_defconfig | 80 ++++++++++++++++++++++++++
include/configs/socfpga_soc64_common.h | 10 ----
2 files changed, 80 insertions(+), 10 deletions(-)
create mode 100644 configs/socfpga_agilex_nand_defconfig
diff --git a/configs/socfpga_agilex_nand_defconfig b/configs/socfpga_agilex_nand_defconfig
new file mode 100644
index 0000000000..455a8ff15b
--- /dev/null
+++ b/configs/socfpga_agilex_nand_defconfig
@@ -0,0 +1,80 @@
+CONFIG_ARM=y
+CONFIG_ARM_SMCCC=y
+CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_TEXT_BASE=0x1000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0x00200000
+CONFIG_DM_GPIO=y
+CONFIG_SPL_TEXT_BASE=0xffe00000
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
+CONFIG_IDENT_STRING="socfpga_agilex"
+CONFIG_SPL_FS_FAT=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_ARMV8_PSCI=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk_nand"
+CONFIG_NAND_BOOT=y
+CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="earlycon panic=-1"
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_MTDIDS_DEFAULT="nand0=ffb90000.nand.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),256k(env),256k(dtb),32m(kernel),32m(misc),-(rootfs)"
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_ALTERA_SDRAM=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_MISC=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_NAND_DENALI_DT=y
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x0
+CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x100000
+CONFIG_SPL_NAND_FRAMEWORK=y
+CONFIG_SF_DEFAULT_MODE=0x2003
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_MII=y
+CONFIG_DM_RESET=y
+CONFIG_SPI=y
+CONFIG_CADENCE_QSPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index 38c77f2f4d..ec283a9307 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -43,16 +43,6 @@
#define CONFIG_SYS_NAND_U_BOOT_SIZE (1 * 1024 * 1024)
#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
-
-/* Environment for NAND boot */
-#if defined(CONFIG_ENV_IS_IN_NAND)
-#undef CONFIG_ENV_OFFSET
-#undef CONFIG_ENV_SIZE
-#define CONFIG_ENV_OFFSET 0x00200000
-#define CONFIG_ENV_SIZE (128 * 1024)
-#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
-#endif
#endif /* CONFIG_NAND_DENALI */
/*
--
2.26.2
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 6/7] arch: arm: dts: HSD #1507526426-9: arm: dts: agilex: Fix incorrect rootfs partition size for NAND
2022-09-11 11:47 [PATCH 1/7] configs: HSD #1507526426-2: configs: socfpga: agilex: Enable CONFIG_CMD_MTD Jit Loon Lim
` (3 preceding siblings ...)
2022-09-11 11:47 ` [PATCH 5/7] configs: HSD #1507526426-8: configs: socfpga: Add Nand defconfig for Agilex Jit Loon Lim
@ 2022-09-11 11:47 ` Jit Loon Lim
2022-09-11 11:47 ` [PATCH 7/7] configs: HSD #1507526426-10: configs: socfpga: agilex: Add NAND boot support Jit Loon Lim
5 siblings, 0 replies; 7+ messages in thread
From: Jit Loon Lim @ 2022-09-11 11:47 UTC (permalink / raw)
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Jit Loon Lim, Sieu Mun Tang, Ley Foon Tan
From: Ley Foon Tan <ley.foon.tan@intel.com>
rootfs partition size should be 0x3bd80000.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
arch/arm/dts/socfpga_agilex_socdk_nand.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/socfpga_agilex_socdk_nand.dts b/arch/arm/dts/socfpga_agilex_socdk_nand.dts
index 556a7b407d..b79f428348 100644
--- a/arch/arm/dts/socfpga_agilex_socdk_nand.dts
+++ b/arch/arm/dts/socfpga_agilex_socdk_nand.dts
@@ -81,7 +81,7 @@
};
partition@4280000 {
label = "rootfs";
- reg = <0x4280000 0x3bd0000>;
+ reg = <0x4280000 0x3bd80000>;
};
};
};
--
2.26.2
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 7/7] configs: HSD #1507526426-10: configs: socfpga: agilex: Add NAND boot support
2022-09-11 11:47 [PATCH 1/7] configs: HSD #1507526426-2: configs: socfpga: agilex: Enable CONFIG_CMD_MTD Jit Loon Lim
` (4 preceding siblings ...)
2022-09-11 11:47 ` [PATCH 6/7] arch: arm: dts: HSD #1507526426-9: arm: dts: agilex: Fix incorrect rootfs partition size for NAND Jit Loon Lim
@ 2022-09-11 11:47 ` Jit Loon Lim
5 siblings, 0 replies; 7+ messages in thread
From: Jit Loon Lim @ 2022-09-11 11:47 UTC (permalink / raw)
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Jit Loon Lim, Sieu Mun Tang, Ley Foon Tan
From: Ley Foon Tan <ley.foon.tan@intel.com>
Add NAND boot env settings
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
include/configs/socfpga_soc64_common.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index ec283a9307..85f42d92c0 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -77,6 +77,11 @@
"scriptfile=u-boot.scr\0" \
"fatscript=if fatload mmc 0:1 ${scriptaddr} ${scriptfile};" \
"then source ${scriptaddr}; fi\0" \
+ "nandroot=/dev/mtdblock5\0" \
+ "nandload=nand read ${loadaddr} kernel; nand read ${fdt_addr} dtb\0" \
+ "nandboot=setenv bootargs " CONFIG_BOOTARGS \
+ " root=${nandroot} rw rootwait rootfstype=jffs2; " \
+ "booti ${loadaddr} - ${fdt_addr}\0" \
"socfpga_legacy_reset_compat=1\0"
/*
--
2.26.2
^ permalink raw reply related [flat|nested] 7+ messages in thread