* [PATCH v2 0/3] Add riscv semihosting support in u-boot
@ 2022-09-16 8:12 Kautuk Consul
2022-09-16 9:08 ` Pali Rohár
0 siblings, 1 reply; 8+ messages in thread
From: Kautuk Consul @ 2022-09-16 8:12 UTC (permalink / raw)
To: Rick Chen, Leo, Sean Anderson, Bin Meng, Anup Patel,
Heinrich Schuchardt, Simon Glass, Ilias Apalodimas,
Alexandru Gagniuc, Philippe Reynes, Rasmus Villemoes,
Eugen Hristev, Stefan Roese, Pali Rohár, Qu Wenruo,
Loic Poulain, Patrick Delaunay
Cc: u-boot, Kautuk Consul
Semihosting is a mechanism that enables code running on
a target to communicate and use the Input/Output
facilities on a host computer that is running a debugger.
This patchset adds support for semihosting in u-boot
for RISCV64 targets.
CHANGES since v1:
- Moved the identical smh_* and semihosting_enabled/disable_semihosting
code of ARM and RISC-V to lib/semihosting.c
- Extend the handle_trap() functionality to call disable_semihosting()
if the cause is a breakpoint (i.e. ebreak instruction)
- Change our implementation of semihosting_enabled to be exactly the
same as the way ARM implemented it
- Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT
configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
gets automatically enabled instead of us #defining it in
include/configs/qemu-riscv.h
Compilation and test commands for SPL and S-mode configurations
=================================================================
U-Boot S-mode on QEMU virt
----------------------------
// Compilation of S-mode u-boot
ARCH=riscv
CROSS_COMPILE=riscv64-unknown-linux-gnu-
make qemu-riscv64_smode_defconfig
make
// Run riscv 64-bit u-boot with opensbi on qemu
qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
u-boot/u-boot.bin
U-Boot SPL on QEMU virt
------------------------
// Compilation of u-boot-spl
ARCH=riscv
CROSS_COMPILE=riscv64-unknown-linux-gnu-
make qemu-riscv64_spl_defconfig
make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
// Run 64-bit u-boot-spl in qemu
qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
u-boot/spl/u-boot-spl.bin -device\
loader,file=u-boot/u-boot.itb,addr=0x80200000
Kautuk Consul (3):
lib: Add common semihosting library
arch/riscv: add semihosting support for RISC-V
board: qemu-riscv: enable semihosting
arch/arm/Kconfig | 2 +
arch/arm/lib/semihosting.c | 179 +-------------------------
arch/riscv/Kconfig | 47 +++++++
arch/riscv/include/asm/semihosting.h | 11 ++
arch/riscv/include/asm/spl.h | 1 +
arch/riscv/lib/Makefile | 2 +
arch/riscv/lib/interrupts.c | 11 ++
arch/riscv/lib/semihosting.c | 24 ++++
configs/qemu-riscv32_defconfig | 4 +
configs/qemu-riscv32_smode_defconfig | 4 +
configs/qemu-riscv32_spl_defconfig | 7 +
configs/qemu-riscv64_defconfig | 4 +
configs/qemu-riscv64_smode_defconfig | 4 +
configs/qemu-riscv64_spl_defconfig | 7 +
include/semihosting.h | 11 ++
lib/Kconfig | 3 +
lib/Makefile | 2 +
lib/semihosting.c | 186 +++++++++++++++++++++++++++
18 files changed, 331 insertions(+), 178 deletions(-)
create mode 100644 arch/riscv/include/asm/semihosting.h
create mode 100644 arch/riscv/lib/semihosting.c
create mode 100644 lib/semihosting.c
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 0/3] Add riscv semihosting support in u-boot
@ 2022-09-16 8:19 Kautuk Consul
0 siblings, 0 replies; 8+ messages in thread
From: Kautuk Consul @ 2022-09-16 8:19 UTC (permalink / raw)
To: Rick Chen, Leo, Sean Anderson, Bin Meng, Anup Patel,
Heinrich Schuchardt, Simon Glass, Ilias Apalodimas,
Alexandru Gagniuc, Philippe Reynes, Rasmus Villemoes,
Eugen Hristev, Stefan Roese, Pali Rohár, Qu Wenruo,
Loic Poulain, Patrick Delaunay
Cc: u-boot, Kautuk Consul
Semihosting is a mechanism that enables code running on
a target to communicate and use the Input/Output
facilities on a host computer that is running a debugger.
This patchset adds support for semihosting in u-boot
for RISCV64 targets.
CHANGES since v1:
- Moved the identical smh_* and semihosting_enabled/disable_semihosting
code of ARM and RISC-V to lib/semihosting.c
- Extend the handle_trap() functionality to call disable_semihosting()
if the cause is a breakpoint (i.e. ebreak instruction)
- Change our implementation of semihosting_enabled to be exactly the
same as the way ARM implemented it
- Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT
configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
gets automatically enabled instead of us #defining it in
include/configs/qemu-riscv.h
Compilation and test commands for SPL and S-mode configurations
=================================================================
U-Boot S-mode on QEMU virt
----------------------------
// Compilation of S-mode u-boot
ARCH=riscv
CROSS_COMPILE=riscv64-unknown-linux-gnu-
make qemu-riscv64_smode_defconfig
make
// Run riscv 64-bit u-boot with opensbi on qemu
qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
u-boot/u-boot.bin
U-Boot SPL on QEMU virt
------------------------
// Compilation of u-boot-spl
ARCH=riscv
CROSS_COMPILE=riscv64-unknown-linux-gnu-
make qemu-riscv64_spl_defconfig
make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
// Run 64-bit u-boot-spl in qemu
qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
u-boot/spl/u-boot-spl.bin -device\
loader,file=u-boot/u-boot.itb,addr=0x80200000
Kautuk Consul (3):
lib: Add common semihosting library
arch/riscv: add semihosting support for RISC-V
board: qemu-riscv: enable semihosting
arch/arm/Kconfig | 2 +
arch/arm/lib/semihosting.c | 179 +-------------------------
arch/riscv/Kconfig | 47 +++++++
arch/riscv/include/asm/semihosting.h | 11 ++
arch/riscv/include/asm/spl.h | 1 +
arch/riscv/lib/Makefile | 2 +
arch/riscv/lib/interrupts.c | 11 ++
arch/riscv/lib/semihosting.c | 24 ++++
configs/qemu-riscv32_defconfig | 4 +
configs/qemu-riscv32_smode_defconfig | 4 +
configs/qemu-riscv32_spl_defconfig | 7 +
configs/qemu-riscv64_defconfig | 4 +
configs/qemu-riscv64_smode_defconfig | 4 +
configs/qemu-riscv64_spl_defconfig | 7 +
include/semihosting.h | 11 ++
lib/Kconfig | 3 +
lib/Makefile | 2 +
lib/semihosting.c | 186 +++++++++++++++++++++++++++
18 files changed, 331 insertions(+), 178 deletions(-)
create mode 100644 arch/riscv/include/asm/semihosting.h
create mode 100644 arch/riscv/lib/semihosting.c
create mode 100644 lib/semihosting.c
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/3] Add riscv semihosting support in u-boot
2022-09-16 8:12 Kautuk Consul
@ 2022-09-16 9:08 ` Pali Rohár
2022-09-16 9:10 ` Kautuk Consul
0 siblings, 1 reply; 8+ messages in thread
From: Pali Rohár @ 2022-09-16 9:08 UTC (permalink / raw)
To: u-boot
Hello! I'm not riscv maintainer and therefore I'm not going to review
this patch series. Please do not spam me with unrelated emails and
patches as I would loose track of patches and emails which are import
and which I should review. Thanks.
On Friday 16 September 2022 13:42:30 Kautuk Consul wrote:
> Semihosting is a mechanism that enables code running on
> a target to communicate and use the Input/Output
> facilities on a host computer that is running a debugger.
> This patchset adds support for semihosting in u-boot
> for RISCV64 targets.
>
> CHANGES since v1:
> - Moved the identical smh_* and semihosting_enabled/disable_semihosting
> code of ARM and RISC-V to lib/semihosting.c
> - Extend the handle_trap() functionality to call disable_semihosting()
> if the cause is a breakpoint (i.e. ebreak instruction)
> - Change our implementation of semihosting_enabled to be exactly the
> same as the way ARM implemented it
> - Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT
> configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
> gets automatically enabled instead of us #defining it in
> include/configs/qemu-riscv.h
>
> Compilation and test commands for SPL and S-mode configurations
> =================================================================
>
> U-Boot S-mode on QEMU virt
> ----------------------------
> // Compilation of S-mode u-boot
> ARCH=riscv
> CROSS_COMPILE=riscv64-unknown-linux-gnu-
> make qemu-riscv64_smode_defconfig
> make
> // Run riscv 64-bit u-boot with opensbi on qemu
> qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
> u-boot/u-boot.bin
>
> U-Boot SPL on QEMU virt
> ------------------------
> // Compilation of u-boot-spl
> ARCH=riscv
> CROSS_COMPILE=riscv64-unknown-linux-gnu-
> make qemu-riscv64_spl_defconfig
> make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
> // Run 64-bit u-boot-spl in qemu
> qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> u-boot/spl/u-boot-spl.bin -device\
> loader,file=u-boot/u-boot.itb,addr=0x80200000
>
> Kautuk Consul (3):
> lib: Add common semihosting library
> arch/riscv: add semihosting support for RISC-V
> board: qemu-riscv: enable semihosting
>
> arch/arm/Kconfig | 2 +
> arch/arm/lib/semihosting.c | 179 +-------------------------
> arch/riscv/Kconfig | 47 +++++++
> arch/riscv/include/asm/semihosting.h | 11 ++
> arch/riscv/include/asm/spl.h | 1 +
> arch/riscv/lib/Makefile | 2 +
> arch/riscv/lib/interrupts.c | 11 ++
> arch/riscv/lib/semihosting.c | 24 ++++
> configs/qemu-riscv32_defconfig | 4 +
> configs/qemu-riscv32_smode_defconfig | 4 +
> configs/qemu-riscv32_spl_defconfig | 7 +
> configs/qemu-riscv64_defconfig | 4 +
> configs/qemu-riscv64_smode_defconfig | 4 +
> configs/qemu-riscv64_spl_defconfig | 7 +
> include/semihosting.h | 11 ++
> lib/Kconfig | 3 +
> lib/Makefile | 2 +
> lib/semihosting.c | 186 +++++++++++++++++++++++++++
> 18 files changed, 331 insertions(+), 178 deletions(-)
> create mode 100644 arch/riscv/include/asm/semihosting.h
> create mode 100644 arch/riscv/lib/semihosting.c
> create mode 100644 lib/semihosting.c
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/3] Add riscv semihosting support in u-boot
2022-09-16 9:08 ` Pali Rohár
@ 2022-09-16 9:10 ` Kautuk Consul
2022-09-16 9:12 ` Pali Rohár
0 siblings, 1 reply; 8+ messages in thread
From: Kautuk Consul @ 2022-09-16 9:10 UTC (permalink / raw)
To: Pali Rohár; +Cc: u-boot
Sorry about that!
I ran get_maintainer.pl on my patchset and got your name
along with several others so I also sent to you.
On Fri, Sep 16, 2022 at 2:38 PM Pali Rohár <pali@kernel.org> wrote:
>
> Hello! I'm not riscv maintainer and therefore I'm not going to review
> this patch series. Please do not spam me with unrelated emails and
> patches as I would loose track of patches and emails which are import
> and which I should review. Thanks.
>
> On Friday 16 September 2022 13:42:30 Kautuk Consul wrote:
> > Semihosting is a mechanism that enables code running on
> > a target to communicate and use the Input/Output
> > facilities on a host computer that is running a debugger.
> > This patchset adds support for semihosting in u-boot
> > for RISCV64 targets.
> >
> > CHANGES since v1:
> > - Moved the identical smh_* and semihosting_enabled/disable_semihosting
> > code of ARM and RISC-V to lib/semihosting.c
> > - Extend the handle_trap() functionality to call disable_semihosting()
> > if the cause is a breakpoint (i.e. ebreak instruction)
> > - Change our implementation of semihosting_enabled to be exactly the
> > same as the way ARM implemented it
> > - Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT
> > configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
> > gets automatically enabled instead of us #defining it in
> > include/configs/qemu-riscv.h
> >
> > Compilation and test commands for SPL and S-mode configurations
> > =================================================================
> >
> > U-Boot S-mode on QEMU virt
> > ----------------------------
> > // Compilation of S-mode u-boot
> > ARCH=riscv
> > CROSS_COMPILE=riscv64-unknown-linux-gnu-
> > make qemu-riscv64_smode_defconfig
> > make
> > // Run riscv 64-bit u-boot with opensbi on qemu
> > qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> > opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
> > u-boot/u-boot.bin
> >
> > U-Boot SPL on QEMU virt
> > ------------------------
> > // Compilation of u-boot-spl
> > ARCH=riscv
> > CROSS_COMPILE=riscv64-unknown-linux-gnu-
> > make qemu-riscv64_spl_defconfig
> > make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
> > // Run 64-bit u-boot-spl in qemu
> > qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> > u-boot/spl/u-boot-spl.bin -device\
> > loader,file=u-boot/u-boot.itb,addr=0x80200000
> >
> > Kautuk Consul (3):
> > lib: Add common semihosting library
> > arch/riscv: add semihosting support for RISC-V
> > board: qemu-riscv: enable semihosting
> >
> > arch/arm/Kconfig | 2 +
> > arch/arm/lib/semihosting.c | 179 +-------------------------
> > arch/riscv/Kconfig | 47 +++++++
> > arch/riscv/include/asm/semihosting.h | 11 ++
> > arch/riscv/include/asm/spl.h | 1 +
> > arch/riscv/lib/Makefile | 2 +
> > arch/riscv/lib/interrupts.c | 11 ++
> > arch/riscv/lib/semihosting.c | 24 ++++
> > configs/qemu-riscv32_defconfig | 4 +
> > configs/qemu-riscv32_smode_defconfig | 4 +
> > configs/qemu-riscv32_spl_defconfig | 7 +
> > configs/qemu-riscv64_defconfig | 4 +
> > configs/qemu-riscv64_smode_defconfig | 4 +
> > configs/qemu-riscv64_spl_defconfig | 7 +
> > include/semihosting.h | 11 ++
> > lib/Kconfig | 3 +
> > lib/Makefile | 2 +
> > lib/semihosting.c | 186 +++++++++++++++++++++++++++
> > 18 files changed, 331 insertions(+), 178 deletions(-)
> > create mode 100644 arch/riscv/include/asm/semihosting.h
> > create mode 100644 arch/riscv/lib/semihosting.c
> > create mode 100644 lib/semihosting.c
> >
> > --
> > 2.34.1
> >
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/3] Add riscv semihosting support in u-boot
2022-09-16 9:10 ` Kautuk Consul
@ 2022-09-16 9:12 ` Pali Rohár
2022-09-16 13:11 ` Sean Anderson
0 siblings, 1 reply; 8+ messages in thread
From: Pali Rohár @ 2022-09-16 9:12 UTC (permalink / raw)
To: Kautuk Consul; +Cc: u-boot
That is strange because I'm not aware of the fact that I'm riscv maintainer.
On Friday 16 September 2022 14:40:46 Kautuk Consul wrote:
> Sorry about that!
> I ran get_maintainer.pl on my patchset and got your name
> along with several others so I also sent to you.
>
> On Fri, Sep 16, 2022 at 2:38 PM Pali Rohár <pali@kernel.org> wrote:
> >
> > Hello! I'm not riscv maintainer and therefore I'm not going to review
> > this patch series. Please do not spam me with unrelated emails and
> > patches as I would loose track of patches and emails which are import
> > and which I should review. Thanks.
> >
> > On Friday 16 September 2022 13:42:30 Kautuk Consul wrote:
> > > Semihosting is a mechanism that enables code running on
> > > a target to communicate and use the Input/Output
> > > facilities on a host computer that is running a debugger.
> > > This patchset adds support for semihosting in u-boot
> > > for RISCV64 targets.
> > >
> > > CHANGES since v1:
> > > - Moved the identical smh_* and semihosting_enabled/disable_semihosting
> > > code of ARM and RISC-V to lib/semihosting.c
> > > - Extend the handle_trap() functionality to call disable_semihosting()
> > > if the cause is a breakpoint (i.e. ebreak instruction)
> > > - Change our implementation of semihosting_enabled to be exactly the
> > > same as the way ARM implemented it
> > > - Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT
> > > configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
> > > gets automatically enabled instead of us #defining it in
> > > include/configs/qemu-riscv.h
> > >
> > > Compilation and test commands for SPL and S-mode configurations
> > > =================================================================
> > >
> > > U-Boot S-mode on QEMU virt
> > > ----------------------------
> > > // Compilation of S-mode u-boot
> > > ARCH=riscv
> > > CROSS_COMPILE=riscv64-unknown-linux-gnu-
> > > make qemu-riscv64_smode_defconfig
> > > make
> > > // Run riscv 64-bit u-boot with opensbi on qemu
> > > qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> > > opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
> > > u-boot/u-boot.bin
> > >
> > > U-Boot SPL on QEMU virt
> > > ------------------------
> > > // Compilation of u-boot-spl
> > > ARCH=riscv
> > > CROSS_COMPILE=riscv64-unknown-linux-gnu-
> > > make qemu-riscv64_spl_defconfig
> > > make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
> > > // Run 64-bit u-boot-spl in qemu
> > > qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> > > u-boot/spl/u-boot-spl.bin -device\
> > > loader,file=u-boot/u-boot.itb,addr=0x80200000
> > >
> > > Kautuk Consul (3):
> > > lib: Add common semihosting library
> > > arch/riscv: add semihosting support for RISC-V
> > > board: qemu-riscv: enable semihosting
> > >
> > > arch/arm/Kconfig | 2 +
> > > arch/arm/lib/semihosting.c | 179 +-------------------------
> > > arch/riscv/Kconfig | 47 +++++++
> > > arch/riscv/include/asm/semihosting.h | 11 ++
> > > arch/riscv/include/asm/spl.h | 1 +
> > > arch/riscv/lib/Makefile | 2 +
> > > arch/riscv/lib/interrupts.c | 11 ++
> > > arch/riscv/lib/semihosting.c | 24 ++++
> > > configs/qemu-riscv32_defconfig | 4 +
> > > configs/qemu-riscv32_smode_defconfig | 4 +
> > > configs/qemu-riscv32_spl_defconfig | 7 +
> > > configs/qemu-riscv64_defconfig | 4 +
> > > configs/qemu-riscv64_smode_defconfig | 4 +
> > > configs/qemu-riscv64_spl_defconfig | 7 +
> > > include/semihosting.h | 11 ++
> > > lib/Kconfig | 3 +
> > > lib/Makefile | 2 +
> > > lib/semihosting.c | 186 +++++++++++++++++++++++++++
> > > 18 files changed, 331 insertions(+), 178 deletions(-)
> > > create mode 100644 arch/riscv/include/asm/semihosting.h
> > > create mode 100644 arch/riscv/lib/semihosting.c
> > > create mode 100644 lib/semihosting.c
> > >
> > > --
> > > 2.34.1
> > >
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/3] Add riscv semihosting support in u-boot
2022-09-16 9:12 ` Pali Rohár
@ 2022-09-16 13:11 ` Sean Anderson
2022-09-16 14:32 ` Tom Rini
0 siblings, 1 reply; 8+ messages in thread
From: Sean Anderson @ 2022-09-16 13:11 UTC (permalink / raw)
To: Pali Rohár, Kautuk Consul; +Cc: u-boot
Hi Pali,
On 9/16/22 05:12, Pali Rohár wrote:
> That is strange because I'm not aware of the fact that I'm riscv maintainer.
get_maintainer will pick up anyone who has touched a file recently, even in
unrelated areas. A quick git log shows that the following commits have
overlapping files with this series:
948da7773e arm: Add new config option ARCH_VERY_EARLY_INIT
1a47e6d47c crc16: Move standard CRC-16 implementation from ubifs to lib
bb3d71b7ef crc16-ccitt: Rename file with CRC-16-CCITT implementation to crc16-ccitt.c
372779abc3 arm: Introduce new CONFIG_SPL_SYS_NO_VECTOR_TABLE option
I'm not a fan of this behavior, so I edit the output of get_maintainers
before using it.
--Sean
> On Friday 16 September 2022 14:40:46 Kautuk Consul wrote:
>> Sorry about that!
>> I ran get_maintainer.pl on my patchset and got your name
>> along with several others so I also sent to you.
>>
>> On Fri, Sep 16, 2022 at 2:38 PM Pali Rohár <pali@kernel.org> wrote:
>>>
>>> Hello! I'm not riscv maintainer and therefore I'm not going to review
>>> this patch series. Please do not spam me with unrelated emails and
>>> patches as I would loose track of patches and emails which are import
>>> and which I should review. Thanks.
>>>
>>> On Friday 16 September 2022 13:42:30 Kautuk Consul wrote:
>>>> Semihosting is a mechanism that enables code running on
>>>> a target to communicate and use the Input/Output
>>>> facilities on a host computer that is running a debugger.
>>>> This patchset adds support for semihosting in u-boot
>>>> for RISCV64 targets.
>>>>
>>>> CHANGES since v1:
>>>> - Moved the identical smh_* and semihosting_enabled/disable_semihosting
>>>> code of ARM and RISC-V to lib/semihosting.c
>>>> - Extend the handle_trap() functionality to call disable_semihosting()
>>>> if the cause is a breakpoint (i.e. ebreak instruction)
>>>> - Change our implementation of semihosting_enabled to be exactly the
>>>> same as the way ARM implemented it
>>>> - Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT
>>>> configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
>>>> gets automatically enabled instead of us #defining it in
>>>> include/configs/qemu-riscv.h
>>>>
>>>> Compilation and test commands for SPL and S-mode configurations
>>>> =================================================================
>>>>
>>>> U-Boot S-mode on QEMU virt
>>>> ----------------------------
>>>> // Compilation of S-mode u-boot
>>>> ARCH=riscv
>>>> CROSS_COMPILE=riscv64-unknown-linux-gnu-
>>>> make qemu-riscv64_smode_defconfig
>>>> make
>>>> // Run riscv 64-bit u-boot with opensbi on qemu
>>>> qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
>>>> opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
>>>> u-boot/u-boot.bin
>>>>
>>>> U-Boot SPL on QEMU virt
>>>> ------------------------
>>>> // Compilation of u-boot-spl
>>>> ARCH=riscv
>>>> CROSS_COMPILE=riscv64-unknown-linux-gnu-
>>>> make qemu-riscv64_spl_defconfig
>>>> make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
>>>> // Run 64-bit u-boot-spl in qemu
>>>> qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
>>>> u-boot/spl/u-boot-spl.bin -device\
>>>> loader,file=u-boot/u-boot.itb,addr=0x80200000
>>>>
>>>> Kautuk Consul (3):
>>>> lib: Add common semihosting library
>>>> arch/riscv: add semihosting support for RISC-V
>>>> board: qemu-riscv: enable semihosting
>>>>
>>>> arch/arm/Kconfig | 2 +
>>>> arch/arm/lib/semihosting.c | 179 +-------------------------
>>>> arch/riscv/Kconfig | 47 +++++++
>>>> arch/riscv/include/asm/semihosting.h | 11 ++
>>>> arch/riscv/include/asm/spl.h | 1 +
>>>> arch/riscv/lib/Makefile | 2 +
>>>> arch/riscv/lib/interrupts.c | 11 ++
>>>> arch/riscv/lib/semihosting.c | 24 ++++
>>>> configs/qemu-riscv32_defconfig | 4 +
>>>> configs/qemu-riscv32_smode_defconfig | 4 +
>>>> configs/qemu-riscv32_spl_defconfig | 7 +
>>>> configs/qemu-riscv64_defconfig | 4 +
>>>> configs/qemu-riscv64_smode_defconfig | 4 +
>>>> configs/qemu-riscv64_spl_defconfig | 7 +
>>>> include/semihosting.h | 11 ++
>>>> lib/Kconfig | 3 +
>>>> lib/Makefile | 2 +
>>>> lib/semihosting.c | 186 +++++++++++++++++++++++++++
>>>> 18 files changed, 331 insertions(+), 178 deletions(-)
>>>> create mode 100644 arch/riscv/include/asm/semihosting.h
>>>> create mode 100644 arch/riscv/lib/semihosting.c
>>>> create mode 100644 lib/semihosting.c
>>>>
>>>> --
>>>> 2.34.1
>>>>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/3] Add riscv semihosting support in u-boot
2022-09-16 13:11 ` Sean Anderson
@ 2022-09-16 14:32 ` Tom Rini
2022-09-17 17:24 ` Sean Anderson
0 siblings, 1 reply; 8+ messages in thread
From: Tom Rini @ 2022-09-16 14:32 UTC (permalink / raw)
To: Sean Anderson; +Cc: Pali Rohár, Kautuk Consul, u-boot
[-- Attachment #1: Type: text/plain, Size: 928 bytes --]
On Fri, Sep 16, 2022 at 09:11:11AM -0400, Sean Anderson wrote:
> Hi Pali,
>
> On 9/16/22 05:12, Pali Rohár wrote:
> > That is strange because I'm not aware of the fact that I'm riscv maintainer.
>
> get_maintainer will pick up anyone who has touched a file recently, even in
> unrelated areas. A quick git log shows that the following commits have
> overlapping files with this series:
>
> 948da7773e arm: Add new config option ARCH_VERY_EARLY_INIT
> 1a47e6d47c crc16: Move standard CRC-16 implementation from ubifs to lib
> bb3d71b7ef crc16-ccitt: Rename file with CRC-16-CCITT implementation to crc16-ccitt.c
> 372779abc3 arm: Introduce new CONFIG_SPL_SYS_NO_VECTOR_TABLE option
>
> I'm not a fan of this behavior, so I edit the output of get_maintainers
> before using it.
Does --no-git provide the behavior you're both looking for? We should
likely tweak the .get_maintainers.conf file.
--
Tom
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/3] Add riscv semihosting support in u-boot
2022-09-16 14:32 ` Tom Rini
@ 2022-09-17 17:24 ` Sean Anderson
0 siblings, 0 replies; 8+ messages in thread
From: Sean Anderson @ 2022-09-17 17:24 UTC (permalink / raw)
To: Tom Rini; +Cc: Pali Rohár, Kautuk Consul, u-boot
On 9/16/22 10:32, Tom Rini wrote:
> On Fri, Sep 16, 2022 at 09:11:11AM -0400, Sean Anderson wrote:
>> Hi Pali,
>>
>> On 9/16/22 05:12, Pali Rohár wrote:
>>> That is strange because I'm not aware of the fact that I'm riscv maintainer.
>>
>> get_maintainer will pick up anyone who has touched a file recently, even in
>> unrelated areas. A quick git log shows that the following commits have
>> overlapping files with this series:
>>
>> 948da7773e arm: Add new config option ARCH_VERY_EARLY_INIT
>> 1a47e6d47c crc16: Move standard CRC-16 implementation from ubifs to lib
>> bb3d71b7ef crc16-ccitt: Rename file with CRC-16-CCITT implementation to crc16-ccitt.c
>> 372779abc3 arm: Introduce new CONFIG_SPL_SYS_NO_VECTOR_TABLE option
>>
>> I'm not a fan of this behavior, so I edit the output of get_maintainers
>> before using it.
>
> Does --no-git provide the behavior you're both looking for? We should
> likely tweak the .get_maintainers.conf file.
>
Yes, but sometimes this information is nice to see. Maybe we should
tweak --git-min-signatures to 2? That would help exclude a lot of
one-off commits, but it wouldn't help with people modifying unrelated
areas (especially in things like Kconfigs/Makefiles). TBH when including
people by activity, I usually inspect the git log and include only
people who are making semantic changes to the file. Of course, this
doesn't work for files which have had few contributors in the past
year...
--Sean
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-09-17 17:25 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2022-09-16 8:19 [PATCH v2 0/3] Add riscv semihosting support in u-boot Kautuk Consul
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2022-09-16 8:12 Kautuk Consul
2022-09-16 9:08 ` Pali Rohár
2022-09-16 9:10 ` Kautuk Consul
2022-09-16 9:12 ` Pali Rohár
2022-09-16 13:11 ` Sean Anderson
2022-09-16 14:32 ` Tom Rini
2022-09-17 17:24 ` Sean Anderson
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