From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B0B0CECAAD8 for ; Fri, 16 Sep 2022 14:23:51 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7272784BB8; Fri, 16 Sep 2022 16:23:49 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="MYMc/MFL"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 219AC84BB7; Fri, 16 Sep 2022 16:23:48 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id EACE884BBA for ; Fri, 16 Sep 2022 16:23:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=jitloonl@ecsmtp.png.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1663338225; x=1694874225; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=KJlKETLhkhaDaMzCSG1SArEiYTNrb9L4df+Y/68xy3E=; b=MYMc/MFLS8hIupAiE5v8r8RcjXJfejO6uxhqyq8tD14RuiwwGnrXDW07 6m3dQMMsm1G5jMcM0zK8v2Th0vngEo7XmeXe3SUl1pdWYraWQ3D5BH9pb xpANI4GbHjKztm+YDQ06C4LGzKXIw0sVhepcP3wh8Qzu9U1CsoVF3L4Cp Jzo0SFkxM7hi9QGPN48Jk3GVKmoJtTH5lSkksrOXTPxSiChUnZJMHh564 5fc1ud7m5PBgoW59fIvik0+EOi0pJsgnnaHhdhcGO22OEwxpvVFiDpLh2 TmliuG5eI9sf9lOhx91niTKtgUzjZvHOnIU3KfC+qFDRBXdOc+x1AMcpB A==; X-IronPort-AV: E=McAfee;i="6500,9779,10472"; a="299824109" X-IronPort-AV: E=Sophos;i="5.93,320,1654585200"; d="scan'208";a="299824109" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2022 07:23:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,320,1654585200"; d="scan'208";a="793112857" Received: from pglmail07.png.intel.com ([10.221.193.207]) by orsmga005.jf.intel.com with ESMTP; 16 Sep 2022 07:23:38 -0700 Received: from localhost (pgli0028.png.intel.com [10.221.84.177]) by pglmail07.png.intel.com (Postfix) with ESMTP id 187C832F3; Fri, 16 Sep 2022 22:23:38 +0800 (+08) Received: by localhost (Postfix, from userid 12048045) id 143D6E00420; Fri, 16 Sep 2022 22:23:38 +0800 (+08) From: Jit Loon Lim To: u-boot@lists.denx.de Cc: Jagan Teki , Vignesh R , Marek , Simon , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Jit Loon Lim , Sieu Mun Tang Subject: [PATCH 1/2] spl: socfpga: Getting SPL boot device from DT Date: Fri, 16 Sep 2022 22:23:35 +0800 Message-Id: <20220916142336.18907-1-jit.loon.lim@intel.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Tien Fong Chee Current SPL boot device is harcoded with MMC1, this implementation would inhibit the support of other boot device. So, this patch is created to get the boot device from DT, user should define the boot device in property "u-boot,boot0". Default MMC1 would be boot device if no boot device is defined in DT. Signed-off-by: Tien Fong Chee Signed-off-by: Jit Loon Lim --- arch/arm/dts/socfpga_stratix10_socdk.dts | 1 + arch/arm/mach-socfpga/spl_s10.c | 65 ++++++++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts index 8aa55a60ab..c8e9261f48 100755 --- a/arch/arm/dts/socfpga_stratix10_socdk.dts +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts @@ -16,6 +16,7 @@ chosen { stdout-path = "serial0:115200n8"; + u-boot,boot0 = <&mmc>; }; leds { diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c index dad2ac5d0d..c4b82ebf14 100644 --- a/arch/arm/mach-socfpga/spl_s10.c +++ b/arch/arm/mach-socfpga/spl_s10.c @@ -13,6 +13,8 @@ #include #include #include +#include +#include #include #include #include @@ -27,6 +29,69 @@ DECLARE_GLOBAL_DATA_PTR; +u32 spl_boot_device(void) +{ + int ret, size; + ofnode node; + const fdt32_t *phandle_p; + u32 phandle; + struct udevice *dev; + + node = ofnode_path("/chosen"); + if (!ofnode_valid(node)) { + debug("%s: /chosen node was not found.\n", __func__); + goto fallback; + } + + phandle_p = ofnode_get_property(node, "u-boot,boot0", &size); + if (!phandle_p) { + debug("%s: u-boot,boot0 property was not found.\n", + __func__); + goto fallback; + } + + phandle = fdt32_to_cpu(*phandle_p); + + node = ofnode_get_by_phandle(phandle); + + ret = device_get_global_by_ofnode(node, &dev); + if (ret) { + debug("%s: Boot device at not found, error: %d\n", __func__, + ret); + goto fallback; + } + + debug("%s: Found boot device %s\n", __func__, dev->name); + + switch (device_get_uclass_id(dev)) { + case UCLASS_SPI_FLASH: + return BOOT_DEVICE_SPI; + case UCLASS_MISC: + return BOOT_DEVICE_NAND; + case UCLASS_MMC: + return BOOT_DEVICE_MMC1; + default: + debug("%s: Booting from device uclass '%s' is not " + "supported\n", __func__, + dev_get_uclass_name(dev)); + } + +fallback: + /* Return default boot device */ + return BOOT_DEVICE_MMC1; +} + +#ifdef CONFIG_SPL_MMC_SUPPORT +u32 spl_mmc_boot_mode(const u32 boot_device) +{ +#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) + return MMCSD_MODE_FS; +#else + return MMCSD_MODE_RAW; +#endif +} +#endif + void board_init_f(ulong dummy) { const struct cm_config *cm_default_cfg = cm_get_default_config(); -- 2.26.2