From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F91DC54EE9 for ; Sun, 18 Sep 2022 11:21:36 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 12D7884601; Sun, 18 Sep 2022 13:21:34 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="cVNmSF+I"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 2E3B28456E; Sun, 18 Sep 2022 13:21:32 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6851684601 for ; Sun, 18 Sep 2022 13:21:29 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=jitloonl@ecsmtp.png.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1663500089; x=1695036089; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=sEdSgwCOeBg/hWq44ZcxIVu68rFQYWxCWa8D0jVsisw=; b=cVNmSF+IBvwAnbknEDpDzs5p/0QACVlHHw0It+Qzvq4WSctKIlHWr+S2 psR4GPs8/jc8ISw/2nB+Y6IUYk5n7GE8VRApTvcu4p0GLmmvEkZW7oiMT ltMPcfIYj7ip38m5RYkiuqwDICMivXTgQ0rp07IYiMdbq5NZM9SitjF7W tn9jluN6d5rqPgOcdVq6Peh2Wk8vSNXmkv4WcpdqoSUfFz4joyQlK18zp cezPAZWcR6guD0MSwzkcz6CvgZ6M0fmToFw4Trw1va/OAXSzAEccY7g/V rNu1kjPUih2w2z8dXVH+d8fBmt2om89kPoA4GOLCy6LZnWsinwLoCo7S+ g==; X-IronPort-AV: E=McAfee;i="6500,9779,10473"; a="282251797" X-IronPort-AV: E=Sophos;i="5.93,325,1654585200"; d="scan'208";a="282251797" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2022 04:21:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,325,1654585200"; d="scan'208";a="620563080" Received: from pglmail07.png.intel.com ([10.221.193.207]) by fmsmga007.fm.intel.com with ESMTP; 18 Sep 2022 04:21:23 -0700 Received: from localhost (pgli0028.png.intel.com [10.221.84.177]) by pglmail07.png.intel.com (Postfix) with ESMTP id A927E32E9; Sun, 18 Sep 2022 19:21:22 +0800 (+08) Received: by localhost (Postfix, from userid 12048045) id A5B9AE00414; Sun, 18 Sep 2022 19:21:22 +0800 (+08) From: Jit Loon Lim To: u-boot@lists.denx.de Cc: Jagan Teki , Vignesh R , Marek , Simon , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Jit Loon Lim , Sieu Mun Tang Subject: [PATCH] arm: socfpga: Add handoff data support for Diamond Mesa Date: Sun, 18 Sep 2022 19:21:21 +0800 Message-Id: <20220918112121.23117-1-jit.loon.lim@intel.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Siew Chin Lim Diamond Mesa support both HPS handoff data and DDR handoff data. HPS handoff data support re-use Straix10 and Agilex code. DDR handoff data is newly introduced in Diamond Mesa. Signed-off-by: Siew Chin Lim Signed-off-by: Jit Loon Lim --- arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h index 902fc6bfb5..51668e8b5c 100644 --- a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h +++ b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h @@ -60,11 +60,11 @@ #define SOC64_HANDOFF_CLOCK (SOC64_HANDOFF_BASE + 0x580) #if IS_ENABLED(CONFIG_TARGET_SOCFPGA_STRATIX10) -#define SOC64_HANDOFF_CLOCK_OSC (SOC64_HANDOFF_BASE + 0x608) -#define SOC64_HANDOFF_CLOCK_FPGA (SOC64_HANDOFF_BASE + 0x60C) +#define SOC64_HANDOFF_CLOCK_OSC (SOC64_HANDOFF_BASE + 0x608) +#define SOC64_HANDOFF_CLOCK_FPGA (SOC64_HANDOFF_BASE + 0x60C) #else -#define SOC64_HANDOFF_CLOCK_OSC (SOC64_HANDOFF_BASE + 0x5fc) -#define SOC64_HANDOFF_CLOCK_FPGA (SOC64_HANDOFF_BASE + 0x600) +#define SOC64_HANDOFF_CLOCK_OSC (SOC64_HANDOFF_BASE + 0x5fc) +#define SOC64_HANDOFF_CLOCK_FPGA (SOC64_HANDOFF_BASE + 0x600) #endif #define SOC64_HANDOFF_MUX_LEN 96 -- 2.26.2