From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 520BBC32771 for ; Sun, 18 Sep 2022 13:20:29 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3E91D84A7A; Sun, 18 Sep 2022 15:20:27 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="iPzW5tNH"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 4625D84A30; Sun, 18 Sep 2022 15:20:25 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4387E84A7A for ; Sun, 18 Sep 2022 15:20:22 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=jitloonl@ecsmtp.png.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1663507222; x=1695043222; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=I97LsZ+jw16GlzSOfv8qrXUsxcVNdP9GCHKF8NyA1d0=; b=iPzW5tNHNF1bAA7SEtlKoAR+WIsfaMtHat3fF+oYmZgP0Y+NWSMVyS2a Agm3SyLXZ2/ydNVAH4teQSVJuUFshJgW+Ysc5QrKdBYnG/EUyZkz9ONqZ dUXrjLq726Rn94hwIVRBmYRD+Xoi52ysvGD90dxdLJmvsquWma0xefJ3H f6RM8xZ0SnpDl5pKcXlBkkOhZ1w1kErhCFvob31XgrEqztucO32xD5F6d v5NkEGRefXtsmjJgwFjyztBcG/0WKCOLlyom1XZBAI8zY04NkFc3Fzcfv TvxhDyrs+nI1r4aXCFwIBBsWA5m1pZXbcKefJbgCzAUG0dCqvF/Yv4nxP A==; X-IronPort-AV: E=McAfee;i="6500,9779,10474"; a="278963737" X-IronPort-AV: E=Sophos;i="5.93,325,1654585200"; d="scan'208";a="278963737" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2022 06:20:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,325,1654585200"; d="scan'208";a="743824465" Received: from pglmail07.png.intel.com ([10.221.193.207]) by orsmga004.jf.intel.com with ESMTP; 18 Sep 2022 06:20:15 -0700 Received: from localhost (pgli0028.png.intel.com [10.221.84.177]) by pglmail07.png.intel.com (Postfix) with ESMTP id D8E7E32E9; Sun, 18 Sep 2022 21:20:14 +0800 (+08) Received: by localhost (Postfix, from userid 12048045) id D48ABE00414; Sun, 18 Sep 2022 21:20:14 +0800 (+08) From: Jit Loon Lim To: u-boot@lists.denx.de Cc: Jagan Teki , Vignesh R , Marek , Simon , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Jit Loon Lim , Sieu Mun Tang , Yau Wai Gan Subject: [PATCH] drivers: cadence_qspi_apb: Add watchdog_reset to prevent timeout Date: Sun, 18 Sep 2022 21:19:56 +0800 Message-Id: <20220918132012.14509-1-jit.loon.lim@intel.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Yau Wai Gan Reset the watchdog within functions that require long processing time to prevent watchdog timeout. Signed-off-by: Yau Wai Gan Signed-off-by: Jit Loon Lim --- drivers/spi/cadence_qspi_apb.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index c00755050e..e7e0bb649f 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -149,6 +149,7 @@ static unsigned int cadence_qspi_wait_idle(void *reg_base) start = get_timer(0); for ( ; get_timer(start) < timeout ; ) { + WATCHDOG_RESET(); if (CQSPI_REG_IS_IDLE(reg_base)) count++; else @@ -356,6 +357,7 @@ int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg) if ((reg & CQSPI_REG_CMDCTRL_INPROGRESS) == 0) break; udelay(1); + WATCHDOG_RESET(); } if (!retry) { @@ -652,6 +654,7 @@ static int cadence_qspi_wait_for_data(struct cadence_spi_plat *plat) if (reg) return reg; udelay(1); + WATCHDOG_RESET(); } return -ETIMEDOUT; @@ -696,6 +699,7 @@ cadence_qspi_apb_indirect_read_execute(struct cadence_spi_plat *plat, rxbuf += bytes_to_read; remaining -= bytes_to_read; bytes_to_read = cadence_qspi_get_rd_sram_level(plat); + WATCHDOG_RESET(); } } @@ -863,6 +867,7 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_plat *plat, bb_txbuf += write_bytes; remaining -= write_bytes; + WATCHDOG_RESET(); } /* Check indirect done status */ -- 2.26.2