From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 659F5C32771 for ; Sun, 18 Sep 2022 15:13:30 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 46DD484BEE; Sun, 18 Sep 2022 17:13:13 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="gc9t3tYr"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 439C884BF4; Sun, 18 Sep 2022 17:13:07 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6526384BE3 for ; Sun, 18 Sep 2022 17:13:03 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=jitloonl@ecsmtp.png.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1663513983; x=1695049983; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=InKaueY++mZDZjLgkX4q8AOoqsP6y0dh/kpnLiaE4G8=; b=gc9t3tYr/LN1pgksya2pBeC0bC2LjSr53j1ke2LzbxFv3XaRLI6tD37J UCYGsMC2EYlAEcgA73I0GfRBwIfDPrEd6EKkBDqry8YsCeBK0Vq/nEIbh y4jjPzXl6ibY84eEfvIM/DLeM3CW2lwTSDgm+w08XYHXbXAGhFxf8AMDG z2aqpAZuuFMD+ErpK8CA+qIGbVRNEpm8lXFlbDPt80pr2b2GkgkCL/F0k i0IEThFlzFYEF648UppJKkwjeS4Eetj9KnH44OW6mLKRgGvTvkqENNZXX dKTwOVKcryOBPo5rpVv3gkVvPteVBK4Q3r6/YYGxmnj7O4BuoCzelg6gg A==; X-IronPort-AV: E=McAfee;i="6500,9779,10474"; a="363200850" X-IronPort-AV: E=Sophos;i="5.93,325,1654585200"; d="scan'208";a="363200850" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2022 08:13:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,325,1654585200"; d="scan'208";a="613744539" Received: from pglmail07.png.intel.com ([10.221.193.207]) by orsmga007.jf.intel.com with ESMTP; 18 Sep 2022 08:12:57 -0700 Received: from localhost (pgli0028.png.intel.com [10.221.84.177]) by pglmail07.png.intel.com (Postfix) with ESMTP id D8C2432EB; Sun, 18 Sep 2022 23:12:56 +0800 (+08) Received: by localhost (Postfix, from userid 12048045) id D7391E00414; Sun, 18 Sep 2022 23:12:56 +0800 (+08) From: Jit Loon Lim To: u-boot@lists.denx.de Cc: Jagan Teki , Vignesh R , Marek , Simon , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Jit Loon Lim , Sieu Mun Tang , Ley Foon Tan Subject: [PATCH 2/5] arm: socfpga: soc64: Change to use spl_perform_fixups() Date: Sun, 18 Sep 2022 23:12:50 +0800 Message-Id: <20220918151253.27301-2-jit.loon.lim@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20220918151253.27301-1-jit.loon.lim@intel.com> References: <20220918151253.27301-1-jit.loon.lim@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Ley Foon Tan spl_board_prepare_for_boot() function is only called in U-boot flow, not for ATF flow. Change to use spl_perform_fixups() to support U-boot and ATF flow. Signed-off-by: Ley Foon Tan Signed-off-by: Jit Loon Lim --- arch/arm/mach-socfpga/spl_soc64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/spl_soc64.c b/arch/arm/mach-socfpga/spl_soc64.c index f3fa1ae361..2204703853 100644 --- a/arch/arm/mach-socfpga/spl_soc64.c +++ b/arch/arm/mach-socfpga/spl_soc64.c @@ -25,7 +25,7 @@ u32 spl_boot_mode(const u32 boot_device) #endif /* board specific function prior loading SSBL / U-Boot */ -void spl_board_prepare_for_boot(void) +void spl_perform_fixups(struct spl_image_info *spl_image) { mbox_hps_stage_notify(HPS_EXECUTION_STATE_SSBL); } -- 2.26.2