From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9EBF1C32771 for ; Sun, 18 Sep 2022 16:17:18 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E981684BE7; Sun, 18 Sep 2022 18:17:15 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Y9YF2BP5"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id B627784BE8; Sun, 18 Sep 2022 18:17:14 +0200 (CEST) Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 2724284BE5 for ; Sun, 18 Sep 2022 18:17:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=e.tomell@gmail.com Received: by mail-ed1-x52b.google.com with SMTP id m3so18155440eda.12 for ; Sun, 18 Sep 2022 09:17:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date; bh=EEJO/uTQPh5jxfJfNLXE3T8ju4HxbDaXMEtoObA79Es=; b=Y9YF2BP5C/jTAkI0tjDLkGO6eNTRVKKMXHHFqqhXfu4TIviwfgYlIhGGo65bBUUTn0 gc0MGeN38e4EnCNDe9NUaKlJtTEufi5+R/zyA5qfCG+Z7dPjTG0bxT+3J8ykVGyqwWFx rbYmLJBNar+lEr2q8Pm48qZSvWdB6gUZDeY9oZdA45lA1rBRiIZQHDsDMplQ/FX0WyJC QxCLkcU81W/7zWiTPzlRzNx4vO+EUrskQw2SvgwlKcYNHnPlFSlOPd6bNXedBSbLTbAD VIKAuWuvVe1206NjKdRwmkBwmopB/R+sV4lT1Q/4InVSAaZ3GRJt9m/t9ew7LuquvJvT 32UA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date; bh=EEJO/uTQPh5jxfJfNLXE3T8ju4HxbDaXMEtoObA79Es=; b=nT98E9pj7Zt13aw1sx0RaJomC4X8PkmqXCaDUbMUwTYEA+uUu7WVAs+z+mIsLnNZjN U5ZAg1Jt+ut9jnuWt6CibM/zn/c1jNBw/M9a2iAbCTYjKlhq+81i61tfjkO0F+rAOWrz NsyMDoq9t2KFVXsUuXkQVDpt+hpZVMMpM9mnIZcLCgEGY0LN7Oi0iLm/GzVzD+q5ajxr VM+AI4kV8r4O6wWr3Bb2lNCpRg3EZicRCIVrwlYry9Sq+786yqsP5bMo9dz3h4JGeqtE VBm1rLc8FqGavOsqiK3HanoqeV14AvzS72uUAY0zH1n/gKMAXJnDROGdFISJ8z82W7tl yiGw== X-Gm-Message-State: ACrzQf1UF31xdsee2F9V+uxBxeqwGLqU/QTJbSTOqVL0utFOkCxe5Sa/ /PySFZuqqKObrSHulgzpeS8= X-Google-Smtp-Source: AMsMyM7JSfSs7qf+V7Rd9XhFMuTUm88c0MohR4QufwPzfX7GHjZNxiFnH+dWUi4fM/3n7Liq6W1QWg== X-Received: by 2002:a05:6402:5112:b0:451:cb1d:c46f with SMTP id m18-20020a056402511200b00451cb1dc46fmr11856321edd.35.1663517831658; Sun, 18 Sep 2022 09:17:11 -0700 (PDT) Received: from localhost.localdomain ([2001:b07:5d38:6a65:a6bb:6dff:fe7c:d4d7]) by smtp.gmail.com with ESMTPSA id p24-20020a056402075800b0045081dc93dfsm18206448edy.78.2022.09.18.09.17.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Sep 2022 09:17:11 -0700 (PDT) From: Edoardo Tomelleri To: u-boot-amlogic Cc: Edoardo Tomelleri , Neil Armstrong , Tom Rini , u-boot@lists.denx.de Subject: [PATCH] arm: amlogic: add setbrg op to serial device Date: Sun, 18 Sep 2022 18:17:01 +0200 Message-Id: <20220918161701.572814-1-e.tomell@gmail.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Implement setbrg in amlogic/meson serial device with driver model similar to how the meson_uart.c driver does it in Linux. Also configure (probe) the serial device with the new reg5 register. Signed-off-by: Edoardo Tomelleri --- drivers/serial/serial_meson.c | 70 +++++++++++++++++++++++++++++++++++ include/configs/meson64.h | 7 ++++ 2 files changed, 77 insertions(+) diff --git a/drivers/serial/serial_meson.c b/drivers/serial/serial_meson.c index d69ec221..90c370cf 100644 --- a/drivers/serial/serial_meson.c +++ b/drivers/serial/serial_meson.c @@ -7,9 +7,11 @@ #include #include #include +#include #include #include #include +#include struct meson_uart { u32 wfifo; @@ -17,6 +19,7 @@ struct meson_uart { u32 control; u32 status; u32 misc; + u32 reg5; /* New baud control register */ }; struct meson_serial_plat { @@ -42,6 +45,35 @@ struct meson_serial_plat { #define AML_UART_RX_RST BIT(23) #define AML_UART_CLR_ERR BIT(24) +/* AML_UART_REG5 bits */ +#define AML_UART_REG5_XTAL_DIV2 BIT(27) +#define AML_UART_REG5_XTAL_CLK_SEL BIT(26) /* default 0 (div by 3), 1 for no div */ +#define AML_UART_REG5_USE_XTAL_CLK BIT(24) /* default 1 (use crystal as clock source) */ +#define AML_UART_REG5_USE_NEW_BAUD BIT(23) /* default 1 (use new baud rate register) */ +#define AML_UART_REG5_BAUD_MASK 0x7fffff + +static u32 meson_calc_baud_divisor(ulong src_rate, u32 baud) +{ + /* + * Usually src_rate is 24 MHz (from crystal) as clock source for serial + * device. Since 8 Mb/s is the maximum supported baud rate, use div by 3 + * to derive baud rate. This choice is used also in meson_serial_setbrg. + */ + return DIV_ROUND_CLOSEST(src_rate / 3, baud) - 1; +} + +static void meson_serial_set_baud(struct meson_uart *uart, ulong src_rate, u32 baud) +{ + /* + * Set crystal divided by 3 (regardless of device tree clock property) + * as clock source and the corresponding divisor to approximate baud + */ + u32 divisor = meson_calc_baud_divisor(src_rate, baud); + u32 val = AML_UART_REG5_USE_XTAL_CLK | AML_UART_REG5_USE_NEW_BAUD | + (divisor & AML_UART_REG5_BAUD_MASK); + writel(val, &uart->reg5); +} + static void meson_serial_init(struct meson_uart *uart) { u32 val; @@ -59,7 +91,14 @@ static int meson_serial_probe(struct udevice *dev) { struct meson_serial_plat *plat = dev_get_plat(dev); struct meson_uart *const uart = plat->reg; + struct clk per_clk; + int ret = clk_get_by_name(dev, "baud", &per_clk); + + if (ret) + return ret; + ulong rate = clk_get_rate(&per_clk); + meson_serial_set_baud(uart, rate, CONFIG_BAUDRATE); meson_serial_init(uart); return 0; @@ -111,6 +150,36 @@ static int meson_serial_putc(struct udevice *dev, const char ch) return 0; } +static int meson_serial_setbrg(struct udevice *dev, const int baud) +{ + /* + * Change device baud rate if baud is reasonable (considering a 23 bit + * counter with an 8 MHz clock input) and the actual baud + * rate is within 2% of the requested value (2% is arbitrary). + */ + if (baud < 1 || baud > 8000000) + return -EINVAL; + + struct meson_serial_plat *const plat = dev_get_plat(dev); + struct meson_uart *const uart = plat->reg; + struct clk per_clk; + int ret = clk_get_by_name(dev, "baud", &per_clk); + + if (ret) + return ret; + ulong rate = clk_get_rate(&per_clk); + u32 divisor = meson_calc_baud_divisor(rate, baud); + u32 calc_baud = (rate / 3) / (divisor + 1); + u32 calc_err = baud > calc_baud ? baud - calc_baud : calc_baud - baud; + + if (((calc_err * 100) / baud) > 2) + return -EINVAL; + + meson_serial_set_baud(uart, rate, baud); + + return 0; +} + static int meson_serial_pending(struct udevice *dev, bool input) { struct meson_serial_plat *plat = dev_get_plat(dev); @@ -154,6 +223,7 @@ static const struct dm_serial_ops meson_serial_ops = { .putc = meson_serial_putc, .pending = meson_serial_pending, .getc = meson_serial_getc, + .setbrg = meson_serial_setbrg, }; static const struct udevice_id meson_serial_ids[] = { diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 196e58ed..01413a02 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -16,6 +16,13 @@ #define GICC_BASE 0xc4302000 #endif +/* Serial drivers */ +/* The following table includes the supported baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, \ + 230400, 250000, 460800, 500000, 1000000, 2000000, 4000000, \ + 8000000 } + /* For splashscreen */ #ifdef CONFIG_DM_VIDEO #define STDOUT_CFG "vidconsole,serial" -- 2.37.3