From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8ECFCC32771 for ; Wed, 21 Sep 2022 05:00:31 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 541AE84B22; Wed, 21 Sep 2022 07:00:19 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="S+ZknWrq"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 50A1284B9A; Wed, 21 Sep 2022 07:00:14 +0200 (CEST) Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id ADC7084B6D for ; Wed, 21 Sep 2022 07:00:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=judge.packham@gmail.com Received: by mail-pj1-x102a.google.com with SMTP id g1-20020a17090a708100b00203c1c66ae3so1020832pjk.2 for ; Tue, 20 Sep 2022 22:00:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=yn+dlPspJJ0JLEk4EqBvl11nbQlqIwqBHK4D8O2U2ag=; b=S+ZknWrqkHB4SX/o2Nug+Bjkzo84TczW2x9J5k0r6XDxNz/K0FYdwGpWBMc6Ke70zL rm6EdkuuJ57Ce2OH+YFKnbtX5/3QeZ/wX9fb/bAaRYEdREuYfgQvwo4wZ5jVE4TaCNY/ japH4jAV+rwUxiS/s9cu90e/dWC2iIbwOwI4bqMctsM6Z9jtwfXqgfaUCtd3caU2zQJd 6Vp/Rhgh3c9jf8OTRgdpypzUhiIeTXzKWGZXskP3LZdxC84EfvIPc5d5C/digY18TEwm x5rS7QKGFchHF5sq5fgjuu0Zxja1QPaabv8BmnZwyPV0nyCCI9f72LTm5tiwzbU4mi29 r7iQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=yn+dlPspJJ0JLEk4EqBvl11nbQlqIwqBHK4D8O2U2ag=; b=FNTu/wwH8cnk3/uPwIJduPkGX/jURTJF4coD1zDI2kyYHu9xsY/lBN3nj7j7s7BCds HSSMHOY7RFQwuroVz46Dk4jeVjh/tqFkuy8+3UMMreo4bxPCgfzTFBlwotm+rBJR5c10 Migd1YLuG8CRMULqDEH8Ad4btHxF2w3YtDk0CYEQ6vX8kGbh2KT0cqqcmXCUFH7Dh0MK zRzAFX/leKJ9/zQ9jlhxgRm3FHy26EGug6Sup7N1IYRQQPd8rY457b7dYAiuWFTcyZn4 254xXS4cGoPg03TS8RDxvnuLmzuSel3D1tr/AhIZ37YwSnth7S7Z6I+H7+Djf0XCyyQG Xqbw== X-Gm-Message-State: ACrzQf12sBMU36XGzq3f8lqB09vO802cR/ZEt1qfAES5LuBJZ/M2tLZR Mp4oyJp/MzoLvJQhPSD3xic= X-Google-Smtp-Source: AMsMyM7cmUMJfO/qvqZ7035/7fuG7YSRCe82HG4wV6P/fthkbdYmM3NGCSBxJJTbV+/FdztMVVe3ng== X-Received: by 2002:a17:90b:3883:b0:203:214d:4272 with SMTP id mu3-20020a17090b388300b00203214d4272mr7451811pjb.101.1663736404484; Tue, 20 Sep 2022 22:00:04 -0700 (PDT) Received: from chrisp-dl.atlnz.lc ([2001:df5:b000:22:b311:e18b:2dd6:19b7]) by smtp.gmail.com with ESMTPSA id b20-20020a630c14000000b0043ab80adf63sm858059pgl.36.2022.09.20.22.00.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Sep 2022 22:00:03 -0700 (PDT) From: Chris Packham To: Stefan Roese Cc: Vadym Kochan , Elad Nachman , Chris Packham , Joe Hershberger , Ramon Fried , u-boot@lists.denx.de Subject: [PATCH v3 1/6] net: mvneta: Add support for AlleyCat5 Date: Wed, 21 Sep 2022 16:59:36 +1200 Message-Id: <20220921045941.571980-2-judge.packham@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220921045941.571980-1-judge.packham@gmail.com> References: <20220921045941.571980-1-judge.packham@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Add support for the AlleyCat5 SoC. This lacks the mbus from the other users of the mvneta.c driver so a new compatible string is needed to allow for a different window configuration. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese --- Changes in v3: - Remove unnecessary changes to RX descriptor handling - Use dev_get_dma_range() to parse dma-ranges property from parent device. drivers/net/Kconfig | 2 +- drivers/net/mvneta.c | 43 ++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 43 insertions(+), 2 deletions(-) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 6bbbadc5ee..8df3dce6df 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -448,7 +448,7 @@ config MVGBE config MVNETA bool "Marvell Armada XP/385/3700 network interface support" - depends on ARMADA_XP || ARMADA_38X || ARMADA_3700 + depends on ARMADA_XP || ARMADA_38X || ARMADA_3700 || ALLEYCAT_5 select PHYLIB select DM_MDIO help diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index d2c42c4396..0fbfad11d4 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -91,6 +91,8 @@ DECLARE_GLOBAL_DATA_PTR; #define MVNETA_WIN_SIZE_MASK (0xffff0000) #define MVNETA_BASE_ADDR_ENABLE 0x2290 #define MVNETA_BASE_ADDR_ENABLE_BIT 0x1 +#define MVNETA_AC5_CNM_DDR_TARGET 0x2 +#define MVNETA_AC5_CNM_DDR_ATTR 0xb #define MVNETA_PORT_ACCESS_PROTECT 0x2294 #define MVNETA_PORT_ACCESS_PROTECT_WIN0_RW 0x3 #define MVNETA_PORT_CONFIG 0x2400 @@ -282,6 +284,8 @@ struct mvneta_port { struct gpio_desc phy_reset_gpio; struct gpio_desc sfp_tx_disable_gpio; #endif + + uintptr_t dma_base; /* base address for DMA address decoding */ }; /* The mvneta_tx_desc and mvneta_rx_desc structures describe the @@ -1343,6 +1347,29 @@ static void mvneta_conf_mbus_windows(struct mvneta_port *pp) mvreg_write(pp, MVNETA_BASE_ADDR_ENABLE, win_enable); } +static void mvneta_conf_ac5_cnm_xbar_windows(struct mvneta_port *pp) +{ + int i; + + /* Clear all windows */ + for (i = 0; i < 6; i++) { + mvreg_write(pp, MVNETA_WIN_BASE(i), 0); + mvreg_write(pp, MVNETA_WIN_SIZE(i), 0); + + if (i < 4) + mvreg_write(pp, MVNETA_WIN_REMAP(i), 0); + } + + /* + * Setup window #0 base 0x0 to target XBAR port 2 (AMB2), attribute 0xb, size 4GB + * AMB2 address decoder remaps 0x0 to DDR 64 bit base address + */ + mvreg_write(pp, MVNETA_WIN_BASE(0), + (MVNETA_AC5_CNM_DDR_ATTR << 8) | MVNETA_AC5_CNM_DDR_TARGET); + mvreg_write(pp, MVNETA_WIN_SIZE(0), 0xffff0000); + mvreg_write(pp, MVNETA_BASE_ADDR_ENABLE, 0x3e); +} + /* Power up the port */ static int mvneta_port_power_up(struct mvneta_port *pp, int phy_mode) { @@ -1525,7 +1552,7 @@ static int mvneta_recv(struct udevice *dev, int flags, uchar **packetp) * No cache invalidation needed here, since the rx_buffer's are * located in a uncached memory region */ - *packetp = data; + *packetp = data + pp->dma_base; /* * Only mark one descriptor as free @@ -1544,6 +1571,10 @@ static int mvneta_probe(struct udevice *dev) struct ofnode_phandle_args sfp_args; #endif void *bd_space; + phys_addr_t cpu; + dma_addr_t bus; + u64 size; + int ret; /* * Allocate buffer area for descs and rx_buffers. This is only @@ -1577,9 +1608,18 @@ static int mvneta_probe(struct udevice *dev) /* Configure MBUS address windows */ if (device_is_compatible(dev, "marvell,armada-3700-neta")) mvneta_bypass_mbus_windows(pp); + else if (device_is_compatible(dev, "marvell,armada-ac5-neta")) + mvneta_conf_ac5_cnm_xbar_windows(pp); else mvneta_conf_mbus_windows(pp); + /* fetch dma ranges property */ + ret = dev_get_dma_range(dev, &cpu, &bus, &size); + if (!ret) + pp->dma_base = cpu; + else + pp->dma_base = 0; + #if CONFIG_IS_ENABLED(DM_GPIO) if (!dev_read_phandle_with_args(dev, "sfp", NULL, 0, 0, &sfp_args) && ofnode_is_enabled(sfp_args.node)) @@ -1620,6 +1660,7 @@ static const struct eth_ops mvneta_ops = { static const struct udevice_id mvneta_ids[] = { { .compatible = "marvell,armada-370-neta" }, + { .compatible = "marvell,armada-ac5-neta" }, { .compatible = "marvell,armada-xp-neta" }, { .compatible = "marvell,armada-3700-neta" }, { } -- 2.37.3