From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2462EECAAD8 for ; Wed, 21 Sep 2022 06:26:51 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7380484915; Wed, 21 Sep 2022 08:26:48 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1663741608; bh=5AEW3brcFG31/WFoE/Y6SKkbLo7s5893ROGsidYHqQc=; h=From:To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From; b=kdATz3B/9OZtF+5ag9CCsiJKv9xpjcUpqN/bItNfoyrIcjtMmX7WImeblZ4gAdZwk C0GR+RjgNLDmv5o1vBM7WzxzOT5IC0vF1DexVjM4MkdIlVhuOoJU4FDXSQDVRGeSl8 mPv3+J96Khx4zaxIhsLzWl2myFzrllF4hdry42mlKLnHcTUduRG/7oyfvq5+9F8p1l mq6D8uLS93vEPlqxDGR6fnS5gpO21dWgk5QL9jVVa5pCvQO1gjtgLpazA7WVZ/JfpQ CG8GlkTNTRsFvEY6QvTw6eSYLt/bSp97mbnZ0F1ccMXXVD9aN2V/i+XHoEeYmfyS7p pePdZ924+r8OA== Received: by phobos.denx.de (Postfix, from userid 109) id CB4A184B4D; Wed, 21 Sep 2022 08:26:47 +0200 (CEST) Received: from mout-u-204.mailbox.org (mout-u-204.mailbox.org [80.241.59.204]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A482C84609 for ; Wed, 21 Sep 2022 08:26:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sr@denx.de Received: from smtp1.mailbox.org (smtp1.mailbox.org [10.196.197.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-204.mailbox.org (Postfix) with ESMTPS id 4MXT2q5qHrz9sTc; Wed, 21 Sep 2022 08:26:43 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Cc: Michael Walle , =?UTF-8?q?Pali=20Roh=C3=A1r?= Subject: [PATCH 1/2] arm: mvebu: Remove timer.c Date: Wed, 21 Sep 2022 08:26:41 +0200 Message-Id: <20220921062642.910994-1-sr@denx.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Since the move to CONFIG_TIMER with support for CONFIG_TIMER_EARLY, this platform specific init_timer() function is not needed any more. Let's remove it completely. Signed-off-by: Stefan Roese Cc: Michael Walle Cc: Pali Rohár --- arch/arm/mach-mvebu/Makefile | 5 ----- arch/arm/mach-mvebu/spl.c | 2 -- arch/arm/mach-mvebu/timer.c | 41 ------------------------------------ 3 files changed, 48 deletions(-) delete mode 100644 arch/arm/mach-mvebu/timer.c diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index 103e64cf2047..406a9ee8f686 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -16,10 +16,6 @@ obj-y = dram.o obj-y += gpio.o obj-y += mbus.o -ifndef CONFIG_TIMER -obj-y += timer.o -endif - else # CONFIG_ARCH_KIRKWOOD obj-y = cpu.o @@ -97,7 +93,6 @@ $(obj)/kwbimage.cfg: $(src)/kwbimage.cfg.in include/autoconf.mk \ endif # CONFIG_SPL_BUILD obj-y += gpio.o obj-y += mbus.o -obj-y += timer.o obj-$(CONFIG_SPL_BUILD) += spl.o obj-$(CONFIG_SPL_BUILD) += lowlevel_spl.o diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index ca2d5a59d773..424599286e5e 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -340,8 +340,6 @@ void board_init_f(ulong dummy) preloader_console_init(); - timer_init(); - /* Armada 375 does not support SerDes and DDR3 init yet */ #if !defined(CONFIG_ARMADA_375) /* First init the serdes PHY's */ diff --git a/arch/arm/mach-mvebu/timer.c b/arch/arm/mach-mvebu/timer.c deleted file mode 100644 index 557a378776d7..000000000000 --- a/arch/arm/mach-mvebu/timer.c +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) Marvell International Ltd. and its affiliates - * Written-by: Prafulla Wadaskar - * - * Copyright (C) 2015 Stefan Roese - */ - -#include -#include -#include -#include -#include - -#define TIMER_LOAD_VAL 0xffffffff - -static int init_done __section(".data") = 0; - -/* - * Timer initialization - */ -int timer_init(void) -{ - /* Only init the timer once */ - if (init_done) - return 0; - init_done = 1; - - /* load value into timer */ - writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x10); - writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x14); - -#if defined(CONFIG_ARCH_MVEBU) - /* On Armada XP / 38x ..., the 25MHz clock source needs to be enabled */ - setbits_le32(MVEBU_TIMER_BASE + 0x00, BIT(11)); -#endif - /* enable timer in auto reload mode */ - setbits_le32(MVEBU_TIMER_BASE + 0x00, 0x3); - - return 0; -} -- 2.37.3