From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C9DBECAAD8 for ; Wed, 21 Sep 2022 14:08:35 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 031CF84CC9; Wed, 21 Sep 2022 16:07:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1663769232; bh=ACysVr+NotV0wlKfoymaVulX/xtVApogFlqj7Jlucgw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=XJcEssnysOOswGhAJdNwwpXha0mo8q/NK/yjK2A2bKM+S1bBexsi1bv709/Ofth3I 7+KDqbQJ+vk1qA5D0yP41in/PewOaJmD0DjUVIhoCkXYayrLPB0BTF9j7WTMnhp+Y5 NUnu6GlNe58MDk24pldrwTo0KRavdkceIkgk5Raw7f2mTnmL8jC6IETmXC7x+9zv89 bZNQEsN6ibSCUikWrn+fyyXPvwu81mT3dB0wQ6qjnt0UtQMl11LLpI4K0+boF1DlBK MEZXBr2I1BJea9GlWgLA8gozPqb8v6Lgh58wRBFP98Fqx1QL3E7AnGvmBR3naoHVs4 yLWK/2QmlCDQw== Received: by phobos.denx.de (Postfix, from userid 109) id 261A284CAF; Wed, 21 Sep 2022 16:06:46 +0200 (CEST) Received: from mout-u-107.mailbox.org (mout-u-107.mailbox.org [IPv6:2001:67c:2050:101:465::107]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id AAB3584CAE for ; Wed, 21 Sep 2022 16:06:33 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sr@denx.de Received: from smtp102.mailbox.org (smtp102.mailbox.org [IPv6:2001:67c:2050:b231:465::102]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-107.mailbox.org (Postfix) with ESMTPS id 4MXgFM59ljz9sf0; Wed, 21 Sep 2022 16:06:31 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Cc: sjg@chromium.org, trini@konsulko.com, Patrick Delaunay , Jun Nie , Shawn Guo , Fabio Estevam , Stefano Babic , Michal Simek , Andre Przywara , Christian Gmeiner , Dario Binacchi , Kever Yang , Philipp Tomsich Subject: [PATCH 10/10] bootstage/timer: Treewide remove timer_get_boot_us() Date: Wed, 21 Sep 2022 16:06:25 +0200 Message-Id: <20220921140625.999002-11-sr@denx.de> In-Reply-To: <20220921140625.999002-1-sr@denx.de> References: <20220921140625.999002-1-sr@denx.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 4MXgFM59ljz9sf0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean With the bootstage migration to timer_get_us() provided via CONFIG_TIMER_EARLY timer_get_boot_us() is superfluous now. This patch removes all occurances from the code. Signed-off-by: Stefan Roese Cc: Patrick Delaunay Cc: Jun Nie Cc: Shawn Guo Cc: Fabio Estevam Cc: Stefano Babic Cc: Michal Simek Cc: Andre Przywara Cc: Christian Gmeiner Cc: Dario Binacchi Cc: Kever Yang Cc: Philipp Tomsich --- arch/arm/cpu/armv7/arch_timer.c | 9 ------ arch/arm/cpu/armv8/generic_timer.c | 7 ----- arch/arm/mach-imx/syscounter.c | 8 ------ arch/sandbox/cpu/cpu.c | 11 ------- drivers/timer/cadence-ttc.c | 22 -------------- drivers/timer/omap-timer.c | 22 -------------- drivers/timer/orion-timer.c | 8 ------ drivers/timer/rockchip_timer.c | 46 ------------------------------ drivers/timer/tsc_timer.c | 5 ---- lib/time.c | 20 ------------- 10 files changed, 158 deletions(-) diff --git a/arch/arm/cpu/armv7/arch_timer.c b/arch/arm/cpu/armv7/arch_timer.c index 80cfaf2d09a4..375b7e2797ef 100644 --- a/arch/arm/cpu/armv7/arch_timer.c +++ b/arch/arm/cpu/armv7/arch_timer.c @@ -49,15 +49,6 @@ unsigned long long get_ticks(void) return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl; } - -ulong timer_get_boot_us(void) -{ - if (!gd->arch.timer_rate_hz) - timer_init(); - - return lldiv(get_ticks(), gd->arch.timer_rate_hz / 1000000); -} - ulong get_tbclk(void) { return gd->arch.timer_rate_hz; diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c index 01a1a167311e..680c547eaf7d 100644 --- a/arch/arm/cpu/armv8/generic_timer.c +++ b/arch/arm/cpu/armv8/generic_timer.c @@ -109,13 +109,6 @@ unsigned long usec2ticks(unsigned long usec) return ticks; } -ulong timer_get_boot_us(void) -{ - u64 val = get_ticks() * 1000000; - - return val / get_tbclk(); -} - unsigned long notrace timer_early_get_rate(void) { return get_tbclk(); diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c index dbe55ee3913d..d592329c163e 100644 --- a/arch/arm/mach-imx/syscounter.c +++ b/arch/arm/mach-imx/syscounter.c @@ -101,14 +101,6 @@ ulong get_timer(ulong base) return tick_to_time(get_ticks()) - base; } -ulong timer_get_boot_us(void) -{ - if (!gd->arch.timer_rate_hz) - timer_init(); - - return tick_to_time(get_ticks()); -} - unsigned long notrace timer_early_get_rate(void) { if (!gd->arch.timer_rate_hz) diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index d077948dd7bd..9c99839a1044 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -362,14 +362,3 @@ done: fail: return NULL; } - -ulong timer_get_boot_us(void) -{ - static uint64_t base_count; - uint64_t count = os_get_nsec(); - - if (!base_count) - base_count = count; - - return (count - base_count) / 1000; -} diff --git a/drivers/timer/cadence-ttc.c b/drivers/timer/cadence-ttc.c index e26c7923a140..39b97825318b 100644 --- a/drivers/timer/cadence-ttc.c +++ b/drivers/timer/cadence-ttc.c @@ -36,28 +36,6 @@ struct cadence_ttc_priv { struct cadence_ttc_regs *regs; }; -#if CONFIG_IS_ENABLED(BOOTSTAGE) -ulong timer_get_boot_us(void) -{ - u64 ticks = 0; - u32 rate = 1; - u64 us; - int ret; - - ret = dm_timer_init(); - if (!ret) { - /* The timer is available */ - rate = timer_get_rate(gd->timer); - timer_get_count(gd->timer, &ticks); - } else { - return 0; - } - - us = (ticks * 1000) / rate; - return us; -} -#endif - unsigned long notrace timer_early_get_rate(void) { return 1; diff --git a/drivers/timer/omap-timer.c b/drivers/timer/omap-timer.c index 315dbb634aa7..c680c4487154 100644 --- a/drivers/timer/omap-timer.c +++ b/drivers/timer/omap-timer.c @@ -84,28 +84,6 @@ static int omap_timer_of_to_plat(struct udevice *dev) return 0; } -#if CONFIG_IS_ENABLED(BOOTSTAGE) -ulong timer_get_boot_us(void) -{ - u64 ticks = 0; - u32 rate = 1; - u64 us; - int ret; - - ret = dm_timer_init(); - if (!ret) { - /* The timer is available */ - rate = timer_get_rate(gd->timer); - timer_get_count(gd->timer, &ticks); - } else { - return 0; - } - - us = (ticks * 1000) / rate; - return us; -} -#endif - unsigned long notrace timer_early_get_rate(void) { return 1; diff --git a/drivers/timer/orion-timer.c b/drivers/timer/orion-timer.c index d0eab3ce781d..c0eadff81cf2 100644 --- a/drivers/timer/orion-timer.c +++ b/drivers/timer/orion-timer.c @@ -86,14 +86,6 @@ u64 notrace timer_early_get_count(void) return orion_timer_get_count((void *)MVEBU_TIMER_BASE); } -ulong timer_get_boot_us(void) -{ - u64 ticks; - - ticks = timer_early_get_count(); - return lldiv(ticks * 1000, timer_early_get_rate()); -} - /* DM timer functions */ static uint64_t dm_orion_timer_get_count(struct udevice *dev) { diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c index 6e3483edce72..7bf79d5f073e 100644 --- a/drivers/timer/rockchip_timer.c +++ b/drivers/timer/rockchip_timer.c @@ -41,52 +41,6 @@ static inline int64_t rockchip_timer_get_curr_value(struct rk_timer *timer) return cntr; } -#if CONFIG_IS_ENABLED(BOOTSTAGE) -ulong timer_get_boot_us(void) -{ - uint64_t ticks = 0; - uint32_t rate; - uint64_t us; - int ret; - - ret = dm_timer_init(); - - if (!ret) { - /* The timer is available */ - rate = timer_get_rate(gd->timer); - timer_get_count(gd->timer, &ticks); - } else if (CONFIG_IS_ENABLED(OF_REAL) && ret == -EAGAIN) { - /* We have been called so early that the DM is not ready,... */ - ofnode node = offset_to_ofnode(-1); - struct rk_timer *timer = NULL; - - /* - * ... so we try to access the raw timer, if it is specified - * via the tick-timer property in /chosen. - */ - node = ofnode_get_chosen_node("tick-timer"); - if (!ofnode_valid(node)) { - debug("%s: no /chosen/tick-timer\n", __func__); - return 0; - } - - timer = (struct rk_timer *)ofnode_get_addr(node); - - /* This timer is down-counting */ - ticks = ~0uLL - rockchip_timer_get_curr_value(timer); - if (ofnode_read_u32(node, "clock-frequency", &rate)) { - debug("%s: could not read clock-frequency\n", __func__); - return 0; - } - } else { - return 0; - } - - us = (ticks * 1000) / rate; - return us; -} -#endif - static u64 timer_early_get_count_rate(uint32_t *rate) { uint64_t ticks = 0; diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index 192c7b71a5a3..3cb2abed0c67 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -363,11 +363,6 @@ ulong notrace timer_get_us(void) return get_ticks() / get_tbclk_mhz(); } -ulong timer_get_boot_us(void) -{ - return timer_get_us(); -} - void __udelay(unsigned long usec) { u64 now = get_ticks(); diff --git a/lib/time.c b/lib/time.c index f3aaf472d103..7492b2bd9c62 100644 --- a/lib/time.c +++ b/lib/time.c @@ -42,26 +42,6 @@ unsigned long notrace timer_read_counter(void) return readl(CONFIG_SYS_TIMER_COUNTER); #endif } - -ulong timer_get_boot_us(void) -{ - ulong count = timer_read_counter(); - -#ifdef CONFIG_SYS_TIMER_RATE - const ulong timer_rate = CONFIG_SYS_TIMER_RATE; - - if (timer_rate == 1000000) - return count; - else if (timer_rate > 1000000) - return lldiv(count, timer_rate / 1000000); - else - return (unsigned long long)count * 1000000 / timer_rate; -#else - /* Assume the counter is in microseconds */ - return count; -#endif -} - #else extern unsigned long __weak timer_read_counter(void); #endif -- 2.37.3