From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 09368C433FE for ; Fri, 7 Oct 2022 17:12:43 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id AE16184E8A; Fri, 7 Oct 2022 19:12:40 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="n9gCk2Hm"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id BCC0184E8D; Fri, 7 Oct 2022 19:12:39 +0200 (CEST) Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0BAE084E89 for ; Fri, 7 Oct 2022 19:12:36 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=afd@ti.com Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 297HCUrm079951; Fri, 7 Oct 2022 12:12:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1665162750; bh=VwIET8WBkPArYzyqxTdHHl9bS8T2V/R6FH4W7WFt43A=; h=From:To:CC:Subject:Date; b=n9gCk2HmDcdyI15HjKk8L0mW3Sbrih0Uf6aaZW8sTfuUzg+EErO2YLLovYOWlw97D TnlHGVzyjxAGXcJJ8CA/4qUdaPzMmPZGvxM5qpAr8vUvB9BtwXZMjBcQ2F1LkhuuIE W8BYqJy6mG4epyTwJW1KTBroWMWDcy1fhApIKWfI= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 297HCUbE027667 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 7 Oct 2022 12:12:30 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Fri, 7 Oct 2022 12:12:29 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Fri, 7 Oct 2022 12:12:29 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 297HCTNL067736; Fri, 7 Oct 2022 12:12:29 -0500 From: Andrew Davis To: Simon Glass , Tom Rini , CC: Andrew Davis Subject: [PATCH] arm: mach-k3: security: Use dma-mapping for cache ops Date: Fri, 7 Oct 2022 12:12:29 -0500 Message-ID: <20221007171229.31721-1-afd@ti.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean This matches how this would be done in Linux and these functions do the alignment for us which makes the code look cleaner. Signed-off-by: Andrew Davis --- arch/arm/mach-k3/security.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-k3/security.c b/arch/arm/mach-k3/security.c index d8d41ec515..092588f4b5 100644 --- a/arch/arm/mach-k3/security.c +++ b/arch/arm/mach-k3/security.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "common.h" @@ -47,7 +48,6 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size) u32 image_size; int ret; - image_addr = (uintptr_t)*p_image; image_size = *p_size; if (!image_size) @@ -80,13 +80,12 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size) return; } + /* Clean out image so it can be seen by system firmware */ + image_addr = dma_map_single(*p_image, *p_size, DMA_BIDIRECTIONAL); + debug("Authenticating image at address 0x%016llx\n", image_addr); debug("Authenticating image of size %d bytes\n", image_size); - flush_dcache_range((unsigned long)image_addr, - ALIGN((unsigned long)image_addr + image_size, - ARCH_DMA_MINALIGN)); - /* Authenticate image */ ret = proc_ops->proc_auth_boot_image(ti_sci, &image_addr, &image_size); if (ret) { @@ -94,10 +93,9 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size) hang(); } + /* Invalidate any stale lines over data written by system firmware */ if (image_size) - invalidate_dcache_range((unsigned long)image_addr, - ALIGN((unsigned long)image_addr + - image_size, ARCH_DMA_MINALIGN)); + dma_unmap_single(image_addr, image_size, DMA_BIDIRECTIONAL); /* * The image_size returned may be 0 when the authentication process has -- 2.37.3