public inbox for u-boot@lists.denx.de
 help / color / mirror / Atom feed
From: Roger Quadros <rogerq@kernel.org>
To: dario.binacchi@amarulasolutions.com,
	michael@amarulasolutions.com, trini@konsulko.com
Cc: u-boot@lists.denx.de, Roger Quadros <rogerq@kernel.org>
Subject: [u-boot][PATCH 04/14] mtd: rawnand: omap_gpmc: Optimize NAND reads
Date: Tue, 11 Oct 2022 14:50:02 +0300	[thread overview]
Message-ID: <20221011115012.6181-5-rogerq@kernel.org> (raw)
In-Reply-To: <20221011115012.6181-1-rogerq@kernel.org>

Rename omap_nand_read() to omap_nand_read_buf() to reflect
actual behaviour.

Use FIFO read address instead of raw read address for reads.

The GPMC automatically converts 32-bit/16-bit reads to NAND
device specific reads (8/16 bit). Use the largest possible
read granularity size for more efficient reads.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
 drivers/mtd/nand/raw/omap_gpmc.c | 49 ++++++++++++++++++--------------
 1 file changed, 28 insertions(+), 21 deletions(-)

diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
index d62c3e6fce..b36fe762b3 100644
--- a/drivers/mtd/nand/raw/omap_gpmc.c
+++ b/drivers/mtd/nand/raw/omap_gpmc.c
@@ -55,6 +55,7 @@ struct omap_nand_info {
 	enum omap_ecc ecc_scheme;
 	uint8_t cs;
 	uint8_t ws;		/* wait status pin (0,1) */
+	void __iomem *fifo;
 };
 
 /* We are wasting a bit of memory but al least we are safe */
@@ -350,6 +351,20 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,
 	return 0;
 }
 
+static inline void omap_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct omap_nand_info *info = nand_get_controller_data(chip);
+	u32 alignment = ((uintptr_t)buf | len) & 3;
+
+	if (alignment & 1)
+		readsb(info->fifo, buf, len);
+	else if (alignment & 3)
+		readsw(info->fifo, buf, len >> 1);
+	else
+		readsl(info->fifo, buf, len >> 2);
+}
+
 #ifdef CONFIG_NAND_OMAP_GPMC_PREFETCH
 
 #define PREFETCH_CONFIG1_CS_SHIFT	24
@@ -415,7 +430,7 @@ static int __read_prefetch_aligned(struct nand_chip *chip, uint32_t *buf, int le
 		cnt = PREFETCH_STATUS_FIFO_CNT(cnt);
 
 		for (i = 0; i < cnt / 4; i++) {
-			*buf++ = readl(CONFIG_SYS_NAND_BASE);
+			*buf++ = readl(info->fifo);
 			len -= 4;
 		}
 	} while (len);
@@ -425,16 +440,6 @@ static int __read_prefetch_aligned(struct nand_chip *chip, uint32_t *buf, int le
 	return 0;
 }
 
-static inline void omap_nand_read(struct mtd_info *mtd, uint8_t *buf, int len)
-{
-	struct nand_chip *chip = mtd_to_nand(mtd);
-
-	if (chip->options & NAND_BUSWIDTH_16)
-		nand_read_buf16(mtd, buf, len);
-	else
-		nand_read_buf(mtd, buf, len);
-}
-
 static void omap_nand_read_prefetch(struct mtd_info *mtd, uint8_t *buf, int len)
 {
 	int ret;
@@ -447,7 +452,7 @@ static void omap_nand_read_prefetch(struct mtd_info *mtd, uint8_t *buf, int len)
 	 */
 	head = ((uintptr_t)buf) % 4;
 	if (head) {
-		omap_nand_read(mtd, buf, head);
+		omap_nand_read_buf(mtd, buf, head);
 		buf += head;
 		len -= head;
 	}
@@ -461,10 +466,10 @@ static void omap_nand_read_prefetch(struct mtd_info *mtd, uint8_t *buf, int len)
 	ret = __read_prefetch_aligned(chip, (uint32_t *)buf, len - tail);
 	if (ret < 0) {
 		/* fallback in case the prefetch engine is busy */
-		omap_nand_read(mtd, buf, len);
+		omap_nand_read_buf(mtd, buf, len);
 	} else if (tail) {
 		buf += len - tail;
-		omap_nand_read(mtd, buf, tail);
+		omap_nand_read_buf(mtd, buf, tail);
 	}
 }
 #endif /* CONFIG_NAND_OMAP_GPMC_PREFETCH */
@@ -1001,6 +1006,8 @@ int board_nand_init(struct nand_chip *nand)
 	int32_t gpmc_config = 0;
 	int cs = cs_next++;
 	int err = 0;
+	struct omap_nand_info *info;
+
 	/*
 	 * xloader/Uboot's gpmc configuration would have configured GPMC for
 	 * nand type of memory. The following logic scans and latches on to the
@@ -1029,9 +1036,12 @@ int board_nand_init(struct nand_chip *nand)
 
 	nand->IO_ADDR_R = (void __iomem *)&gpmc_cfg->cs[cs].nand_dat;
 	nand->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_cmd;
-	omap_nand_info[cs].control = NULL;
-	omap_nand_info[cs].cs = cs;
-	omap_nand_info[cs].ws = wscfg[cs];
+
+	info = &omap_nand_info[cs];
+	info->control = NULL;
+	info->cs = cs;
+	info->ws = wscfg[cs];
+	info->fifo = (void __iomem *)CONFIG_SYS_NAND_BASE;
 	nand_set_controller_data(nand, &omap_nand_info[cs]);
 	nand->cmd_ctrl	= omap_nand_hwcontrol;
 	nand->options	|= NAND_NO_PADDING | NAND_CACHEPRG;
@@ -1062,10 +1072,7 @@ int board_nand_init(struct nand_chip *nand)
 #ifdef CONFIG_NAND_OMAP_GPMC_PREFETCH
 	nand->read_buf = omap_nand_read_prefetch;
 #else
-	if (nand->options & NAND_BUSWIDTH_16)
-		nand->read_buf = nand_read_buf16;
-	else
-		nand->read_buf = nand_read_buf;
+	nand->read_buf = omap_nand_read_buf;
 #endif
 
 	nand->dev_ready = omap_dev_ready;
-- 
2.17.1


  parent reply	other threads:[~2022-10-11 11:51 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-11 11:49 [u-boot][PATCH 00/14] rawnand: omap_gpmc: driver model support Roger Quadros
2022-10-11 11:49 ` [u-boot][PATCH 01/14] mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h Roger Quadros
2022-10-12 10:01   ` Michael Nazzareno Trimarchi
2022-10-11 11:50 ` [u-boot][PATCH 02/14] mtd: rawnand: omap_gpmc: Enable build for K2/K3 platforms Roger Quadros
2022-10-12 11:49   ` Michael Nazzareno Trimarchi
2022-10-11 11:50 ` [u-boot][PATCH 03/14] mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Roger Quadros
2022-10-15  5:53   ` Michael Nazzareno Trimarchi
2022-10-11 11:50 ` Roger Quadros [this message]
2022-10-15  7:24   ` [u-boot][PATCH 04/14] mtd: rawnand: omap_gpmc: Optimize NAND reads Michael Nazzareno Trimarchi
2022-10-15 13:29     ` Roger Quadros
2022-10-17  6:39       ` Michael Nazzareno Trimarchi
2022-10-17  8:14         ` Roger Quadros
2022-10-11 11:50 ` [u-boot][PATCH 05/14] mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction Roger Quadros
2022-11-28 14:03   ` Michael Nazzareno Trimarchi
2022-11-29 15:25   ` Dario Binacchi
2022-11-29 16:17     ` Tom Rini
2022-11-30  8:11       ` Dario Binacchi
2022-12-01 11:42         ` Roger Quadros
2022-10-11 11:50 ` [u-boot][PATCH 06/14] mtd: rawnand: nand_base: Allow base driver to be used in SPL without nand_bbt Roger Quadros
2022-11-28 14:27   ` Michael Nazzareno Trimarchi
2022-11-29 13:04     ` Roger Quadros
2022-10-11 11:50 ` [u-boot][PATCH 07/14] mtd: rawnand: nand_spl_loaders: Fix cast type build warning Roger Quadros
2022-11-06 19:50   ` Michael Nazzareno Trimarchi
2022-10-11 11:50 ` [u-boot][PATCH 08/14] mtd: rawnand: omap_gpmc: Reduce .bss usage Roger Quadros
2022-11-28 14:11   ` Michael Nazzareno Trimarchi
2022-10-11 11:50 ` [u-boot][PATCH 09/14] dt-bindings: mtd: Add ti, gpmc-nand DT binding documentation Roger Quadros
2022-10-11 11:50 ` [u-boot][PATCH 10/14] mtd: rawnand: omap_gpmc: support u-boot driver model Roger Quadros
2022-10-11 15:01   ` Adam Ford
2022-10-12  6:22     ` Roger Quadros
2022-10-12 11:42       ` Adam Ford
2022-10-12 11:57         ` Ladislav Michl
2022-10-12 12:02           ` Adam Ford
2022-10-13 11:17         ` Adam Ford
2022-10-13 19:42           ` Roger Quadros
2022-10-11 11:50 ` [u-boot][PATCH 11/14] mtd: rawnand: omap_gpmc: Add SPL NAND support Roger Quadros
2022-10-11 11:50 ` [u-boot][PATCH 12/14] mtd: rawnand: omap_gpmc: Enable SYS_NAND_PAGE_COUNT for OMAP_GPMC Roger Quadros
2022-10-11 11:50 ` [u-boot][PATCH 13/14] dt-bindings: mtd: Add ti, elm DT binding documentation Roger Quadros
2022-10-11 11:50 ` [u-boot][PATCH 14/14] mtd: rawnand: omap_elm: u-boot driver model support Roger Quadros
2022-11-04 13:27 ` [u-boot][PATCH 00/14] rawnand: omap_gpmc: " Roger Quadros
2022-11-08  9:26   ` Michael Nazzareno Trimarchi
2022-11-25 12:38     ` Roger Quadros
2022-12-11 13:56       ` Dario Binacchi
2022-12-12  9:12         ` Roger Quadros
2022-12-12  9:27           ` Dario Binacchi
2022-12-12  9:39             ` Michael Nazzareno Trimarchi
2022-12-17 13:00               ` Roger Quadros
2022-12-17 13:38                 ` Michael Nazzareno Trimarchi
2022-12-17 13:43                   ` Roger Quadros
2022-12-17 13:46                     ` Michael Nazzareno Trimarchi
2022-12-17 13:51                       ` Michael Nazzareno Trimarchi
2022-12-17 13:59                         ` Roger Quadros
2022-12-17 14:09                           ` Michael Nazzareno Trimarchi
2022-12-17 14:48                             ` Michael Nazzareno Trimarchi
2022-12-12 13:58             ` Tom Rini

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20221011115012.6181-5-rogerq@kernel.org \
    --to=rogerq@kernel.org \
    --cc=dario.binacchi@amarulasolutions.com \
    --cc=michael@amarulasolutions.com \
    --cc=trini@konsulko.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox