From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5FA7C433FE for ; Sat, 22 Oct 2022 00:59:16 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B160D84FE7; Sat, 22 Oct 2022 02:59:11 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="e9VR/sg4"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A77F384FEA; Sat, 22 Oct 2022 02:58:54 +0200 (CEST) Received: from mail-qv1-xf36.google.com (mail-qv1-xf36.google.com [IPv6:2607:f8b0:4864:20::f36]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7E2C284FCE for ; Sat, 22 Oct 2022 02:58:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=aford173@gmail.com Received: by mail-qv1-xf36.google.com with SMTP id e15so2846372qvo.4 for ; Fri, 21 Oct 2022 17:58:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2mqWDXOIpoF5c5OR1rB5tIc8Bcwr2gPa+xWGylwMCRo=; b=e9VR/sg4iw4X2dcjd0mCIzeszzR5GCvVihPG/YJeLT+7KxOSflHAmUX8Yaq644KF3+ 7hJTbB0jUO9SEdGDoV5laCcI3fPsRO5c2acGxS9TScIM5fVPzKv2ckP+8tWaPahvcMlz DcT1HtQtIKxKCgHNMhnwrq7HYpuK6B3T6T1etsyRDBXxmtIkfDf+NwwljsusX98d9z7f cR+b2kqQ4APObCWnG3byQt4fOEoSRSueFNrVDO9Kx7J1o/y80EfGjTW8qKmdWGYiqCqg 3rpSQl2dkTpWx3oAF9LhfjLTFfFzM55bZ5PJbe8tuEDpn0zetNEHfwqcE7LJzoAq7Dut M9nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2mqWDXOIpoF5c5OR1rB5tIc8Bcwr2gPa+xWGylwMCRo=; b=hM4YJIQtnPQf2YrGO0MaSNI3mcODyfDfTeL5XFXJi/Qa0Kyia1XDSwBg9gVoNr/nq+ maDWl0JfzPN6MA3idTQowky1GaLtvb64SznaQ2wqtAuCnAw30L2sTmtNIF5xeqM2syNR AnaTdhfQI0SHlmsBTPQY6j8dWz98mzdM9hZZE/RvkKRv+IolYSPpC43mwsElp5OzLYlT hpUQuHBJwbKC7TFJfz6hI912NgmAEQzvYuF1RfBegwYBHA5u+q0c1BoeRSX3IRkfNnO4 KuUNDOByO0tzn30r/0tr95TzeOWo+MhRi7R5ZJoFiD7B1V1zPfEOCAqvgOZ2BjCNZbcx pbxg== X-Gm-Message-State: ACrzQf3jht9zGE6AwcdF4nYA4B89g1nsbgIwNVy71dUcWx/5eifCj0fK iVTq7NZ0+8m1lDKCDklYxA8ncB0NJEo= X-Google-Smtp-Source: AMsMyM4eubugL3n2cYg3Jch4whKFT/DvYLmq616eGduuJlLdYsZiBFS1wAu+Yco4CSltXyfuko3DsQ== X-Received: by 2002:a05:6214:d0c:b0:4b3:36b4:c89a with SMTP id 12-20020a0562140d0c00b004b336b4c89amr19561177qvh.93.1666400326724; Fri, 21 Oct 2022 17:58:46 -0700 (PDT) Received: from aford-IdeaCentre-A730.lan ([2601:447:d081:b229:10c8:126:4b77:a67d]) by smtp.gmail.com with ESMTPSA id b14-20020ac844ce000000b003434d3b5938sm8869620qto.2.2022.10.21.17.58.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Oct 2022 17:58:46 -0700 (PDT) From: Adam Ford To: u-boot@lists.denx.de Cc: Adam Ford , Fabio Estevam , Stefano Babic , Fabio Estevam , "NXP i.MX U-Boot Team" , "Ariel D'Alessandro" , Michael Trimarchi , Tim Harvey Subject: [PATCH V2 1/7] arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi Date: Fri, 21 Oct 2022 19:58:31 -0500 Message-Id: <20221022005837.170357-2-aford173@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221022005837.170357-1-aford173@gmail.com> References: <20221022005837.170357-1-aford173@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Multiple boards create duplicate entries in their respective -u-boot.dtsi files which all basically do the same thing. To consolidate these and make it easier to make improvements going forward, consolidate them all into one place. This file creates a flash.bin image using binman, and supports LPDDR4, DDR4 and DDR3. Since individual boards use different peripherals and different UART ports, those entries were kept in their respective board files, but the spba1 node was addded which contains all UART1-3 to help facilitate SPL_DM_SERIAL. Individual users will still need to include their respective UART and pinctrl nodes for those UARTS. This consolidated file also supports generating a flash.bin file which can boot from flexSPI if CONFIG_FSPI_CONF_HEADER is enabled. Signed-off-by: Adam Ford Reviewed-by: Fabio Estevam diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi new file mode 100644 index 0000000000..327d4070fc --- /dev/null +++ b/arch/arm/dts/imx8mn-u-boot.dtsi @@ -0,0 +1,248 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2022 Logic PD, Inc dba Beacon EmbeddedWorks + */ + +/ { + binman: binman { + multiple-images; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdog1>; + u-boot,dm-spl; + }; +}; + +&{/soc@0} { + u-boot,dm-pre-reloc; + u-boot,dm-spl; +}; + +&aips1 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&aips2 { + u-boot,dm-spl; +}; + +&aips3 { + u-boot,dm-spl; +}; + +&aips4 { + u-boot,dm-spl; +}; + +&clk { + u-boot,dm-spl; + u-boot,dm-pre-reloc; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; +}; + +&iomuxc { + u-boot,dm-spl; +}; + +&osc_24m { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&spba1 { + u-boot,dm-spl; +}; + +&wdog1 { + u-boot,dm-spl; +}; + +&binman { + u-boot-spl-ddr { + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + align-size = <4>; + align = <4>; + + u-boot-spl { + align-end = <4>; + filename = "u-boot-spl.bin"; + }; + + ddr-1d-imem-fw { +#ifdef CONFIG_IMX8M_LPDDR4 + filename = "lpddr4_pmu_train_1d_imem.bin"; +#elif CONFIG_IMX8M_DDR4 + filename = "ddr4_imem_1d.bin"; +#else + filename = "ddr3_imem_1d.bin"; +#endif + type = "blob-ext"; + align-end = <4>; + }; + + ddr-1d-dmem-fw { +#ifdef CONFIG_IMX8M_LPDDR4 + filename = "lpddr4_pmu_train_1d_dmem.bin"; +#elif CONFIG_IMX8M_DDR4 + filename = "ddr4_dmem_1d.bin"; +#else + filename = "ddr3_dmem_1d.bin"; +#endif + type = "blob-ext"; + align-end = <4>; + }; + + ddr-2d-imem-fw { +#ifdef CONFIG_IMX8M_LPDDR4 + filename = "lpddr4_pmu_train_2d_imem.bin"; +#elif CONFIG_IMX8M_DDR4 + filename = "ddr4_imem_2d.bin"; +#endif + type = "blob-ext"; + align-end = <4>; + }; + + ddr-2d-dmem-fw { +#ifdef CONFIG_IMX8M_LPDDR4 + filename = "lpddr4_pmu_train_2d_dmem.bin"; +#elif CONFIG_IMX8M_DDR4 + filename = "ddr4_dmem_2d.bin"; +#endif + type = "blob-ext"; + align-end = <4>; + }; + }; + + spl { + filename = "spl.bin"; + + mkimage { + args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x912000"; + + blob { + filename = "u-boot-spl-ddr.bin"; + }; + }; + }; + + itb { + filename = "u-boot.itb"; + + fit { + description = "Configuration to load ATF before U-Boot"; + fit,external-offset = ; + fit,fdt-list = "of-list"; + #address-cells = <1>; + + images { + uboot { + arch = "arm64"; + compression = "none"; + description = "U-Boot (64-bit)"; + load = ; + type = "standalone"; + + uboot-blob { + filename = "u-boot-nodtb.bin"; + type = "blob-ext"; + }; + }; + + atf { + arch = "arm64"; + compression = "none"; + description = "ARM Trusted Firmware"; + entry = <0x960000>; + load = <0x960000>; + type = "firmware"; + + atf-blob { + filename = "bl31.bin"; + type = "atf-bl31"; + }; + }; + + binman_fip: fip { + arch = "arm64"; + compression = "none"; + description = "Trusted Firmware FIP"; + load = <0x40310000>; + type = "firmware"; + }; + + @fdt-SEQ { + compression = "none"; + description = "NAME"; + type = "flat_dt"; + + uboot-fdt-blob { + filename = "u-boot.dtb"; + type = "blob-ext"; + }; + }; + }; + + configurations { + default = "@config-DEFAULT-SEQ"; + + binman_configuration: @config-SEQ { + description = "NAME"; + fdt = "fdt-SEQ"; + firmware = "uboot"; + loadables = "atf"; + }; + }; + }; + }; + + imx-boot { + filename = "flash.bin"; + pad-byte = <0x00>; + +#ifdef CONFIG_FSPI_CONF_HEADER + fspi_conf_block { + filename = CONFIG_FSPI_CONF_FILE; + type = "blob-ext"; + offset = <0x400>; + }; + + spl { + filename = "spl.bin"; + offset = <0x1000>; + type = "blob-ext"; + }; + + binman_uboot: uboot { + filename = "u-boot.itb"; + offset = <0x59000>; + type = "blob-ext"; + }; +#else + + spl { + offset = <0x0>; + filename = "spl.bin"; + type = "blob-ext"; + }; + + binman_uboot: uboot { + offset = <0x58000>; + filename = "u-boot.itb"; + type = "blob-ext"; + }; +#endif + }; +}; -- 2.34.1