[PATCH v1 0/6] clk: microchip: mpfs: incremental fixes

[Conor Dooley <conor.dooley@microchip.com>]

Hey All,
When trying to sync the Linux device tree with U-Boot, the clock driver's
expectation that the input clock it gets is the mss pll presented itself
as a problem. The mss pll is not a fixed frequency clock and the Linux
devicetree has the actual off-chip oscillator & the clock driver there
uses that. This had gone un-noticed in the original dt upstreaming to
Linux and I noticed it while upstreaming the clock driver there.

I order to switch the clock driver over to using the real reference, we
first need to switch over from reading a property of what we assume to be
a fixed-frequency clock in the device tree to using clk_get_rate() and
fix the parentage of the "periph" clocks to represent their actual
relationships to their parents rather than using this fixed-frequency
clock in the devicetree to determine their rates.

With that done, we can then introduce a small driver for the msspll
itself, which we will use if the corrected devicetree node for the clock
controller is present.

There are some more fixes required, specifically handling of the mtimer
clock and of the refclk for the rtc which I have not addressed here, but
will deal with in a follow-up series. I've omitted these fixes here to
do just what is needed to unblock the dt sync.

Thanks,
Conor.

Conor Dooley (6):
  dt-bindings: clk: add missing clk ids for microchip mpfs
  clk: microchip: mpfs: convert parent rate acquistion to get_get_rate()
  clk: microchip: mpfs: fix reference clock handling
  clk: microchip: mpfs: fix periph clk parentage
  clk: microchip: mpfs: fix criticality of peripheral clocks
  riscv: dts: fix the mpfs's reference clock frequency

 arch/riscv/dts/microchip-mpfs-icicle-kit.dts  |   4 +
 arch/riscv/dts/microchip-mpfs.dtsi            |  14 +--
 drivers/clk/microchip/Makefile                |   2 +-
 drivers/clk/microchip/mpfs_clk.c              |  37 ++++--
 drivers/clk/microchip/mpfs_clk.h              |  20 +--
 drivers/clk/microchip/mpfs_clk_cfg.c          |   7 +-
 drivers/clk/microchip/mpfs_clk_msspll.c       | 119 ++++++++++++++++++
 drivers/clk/microchip/mpfs_clk_periph.c       |  96 +++++++-------
 .../dt-bindings/clock/microchip-mpfs-clock.h  |   3 +
 9 files changed, 229 insertions(+), 73 deletions(-)
 create mode 100644 drivers/clk/microchip/mpfs_clk_msspll.c

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2.38.0