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From: Yu Chien Peter Lin <peterlin@andestech.com>
To: <u-boot@lists.denx.de>
Cc: <ycliang@andestech.com>, <rick@andestech.com>,
	Yu Chien Peter Lin <peterlin@andestech.com>
Subject: [PATCH] riscv: Fix detecting FPU support in standard extension
Date: Fri, 4 Nov 2022 19:21:27 +0800	[thread overview]
Message-ID: <20221104112127.30467-1-peterlin@andestech.com> (raw)

We should check the string until it hits underscore, in case it
searches for the letters in the custom extension. For example,
"rv64imac_xandes" will be treated as D extension support since
there is a "d" in "andes", resulting illegal instruction caused
by initializing FCSR.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
---
 arch/riscv/cpu/cpu.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 52ab02519f..dc949c1306 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -36,6 +36,7 @@ static inline bool supports_extension(char ext)
 #ifdef CONFIG_CPU
 	struct udevice *dev;
 	char desc[32];
+	int i;
 
 	uclass_find_first_device(UCLASS_CPU, &dev);
 	if (!dev) {
@@ -43,9 +44,16 @@ static inline bool supports_extension(char ext)
 		return false;
 	}
 	if (!cpu_get_desc(dev, desc, sizeof(desc))) {
-		/* skip the first 4 characters (rv32|rv64) */
-		if (strchr(desc + 4, ext))
-			return true;
+		/*
+		 * skip the first 4 characters (rv32|rv64) and
+		 * check until underscore
+		 */
+		for (i = 4; i < sizeof(desc); i++) {
+			if (!(desc[i] - '_'))
+				break;
+			if (desc[i] == ext)
+				return true;
+		}
 	}
 
 	return false;
-- 
2.34.1


             reply	other threads:[~2022-11-04 12:54 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-04 11:21 Yu Chien Peter Lin [this message]
2022-11-05  4:39 ` [PATCH] riscv: Fix detecting FPU support in standard extension Samuel Holland
2022-11-05 13:12   ` Yu-Chien Peter Lin

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