From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 03BDBC433FE for ; Sat, 5 Nov 2022 04:24:24 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 800D2851C8; Sat, 5 Nov 2022 05:24:22 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="jiWV/xu5"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id B5A67851CB; Sat, 5 Nov 2022 05:24:20 +0100 (CET) Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 1A211851A3 for ; Sat, 5 Nov 2022 05:24:18 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=judge.packham@gmail.com Received: by mail-pj1-x1032.google.com with SMTP id q1-20020a17090a750100b002139ec1e999so6126690pjk.1 for ; Fri, 04 Nov 2022 21:24:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=3QQllYIlXi93gbNaXQusMLTTeL6qkP84FYYXkD3clAQ=; b=jiWV/xu5WSXT4TnVvIUACvRPwoYGfATG5+wKCQMc3J6SjOKoAdT5zsVO3ptNjxYZd7 kP7YLUgJ8YU5EWE5UdtPF+BvVEo+/T30vq9+6cO5OPnxqqI86sSZiV1EYimIoVvCy+SF jIGAZ2Yw9KxjNKnh6EC14XvYFs3hZgEnLky6aVk6biDmEFOT1Iqb2IxR6lu8Z8oAx43o WlVfyvD2QSyRz3MU56BdiCAEuNnisybCyA1Lkl/obkZyXt5fgL3g2JHsAr4Uu2/7EOW4 LZpJBFR/F9uNMPeqdT4lvJI58nLAibmfh2qp4AY19aF3e2zXCQ93zvHlIPfGTOV5680p 3cXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=3QQllYIlXi93gbNaXQusMLTTeL6qkP84FYYXkD3clAQ=; b=PLotM6l92f5rzuI4QgM09b0k3KWoKvGQ4WyZ8BC8q+a7yOm+Nu3O7wCEnluvAKyp2g 1aNJFiMfj65A931Z3LhfsXF+vZNfhamv57fRWwjdhAdXH4v1evgxzEnSrts7p5/OckQU JikSC0atmi5zlelfmoxR3Awy0KhgWN/A+JknSXVCKWOGkXP90he8IyB9ikS7LfhfUCFr gjLZWEHSbIEQnEHcdrhk1n4NKD817t4hXk49Wxhqiwa6Lsd39P7M9gmIEaDt8hi0PVfi JIMozTayf13xCVkFkIekW3PJoQVahem7GCMkTdxIAwLM+5RjP2r1SOMpgl0IMTDbLvnj aeGA== X-Gm-Message-State: ANoB5pnzHU6qB62v6QeGzGYRSEZmF8nv7KHRWwO3sI1cAyTLFA+dN+no CWlSI2AgTR2QYLfRlJq1B+I= X-Google-Smtp-Source: AA0mqf5umQaBpCkYFnfEGmmMPymvKReTG33/8bivpNAvDnwQKTwiE63vmMsv3VhM15B7QOv7CFzGPQ== X-Received: by 2002:a17:903:40c7:b0:188:64aa:c5c5 with SMTP id t7-20020a17090340c700b0018864aac5c5mr6452708pld.142.1667622256169; Fri, 04 Nov 2022 21:24:16 -0700 (PDT) Received: from chrisp-dl.atlnz.lc ([2001:df5:b000:22:89de:4dc7:b348:99d]) by smtp.gmail.com with ESMTPSA id p67-20020a625b46000000b005625d6d2999sm384126pfb.187.2022.11.04.21.24.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Nov 2022 21:24:15 -0700 (PDT) From: Chris Packham To: Stefan Roese Cc: Elad Nachman , Vadym Kochan , Chris Packham , Adam Ford , Bharat Gooty , Chris Packham , Fabio Estevam , Frieder Schrempf , Jim Liu , Joe Hershberger , Lukasz Majewski , Marcel Ziswiler , =?UTF-8?q?Marek=20Beh=C3=BAn?= , Marek Vasut , =?UTF-8?q?Pali=20Roh=C3=A1r?= , Philippe Reynes , Ramon Fried , Rayagonda Kokatanur , Samuel Holland , Simon Glass , Tom Rini , Weijie Gao , William Zhang , "Ying-Chun Liu (PaulLiu)" , u-boot@lists.denx.de Subject: [PATCH v6 0/6] arm: mvebu: Support for 98DX25xx/98DX35xx (AlleyCat5) Date: Sat, 5 Nov 2022 17:23:54 +1300 Message-Id: <20221105042400.277650-1-judge.packham@gmail.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean These patches are based on Marvell's bootloader for the AlleyCat5/5X which was based on u-boot 2018.03. I've split that code into consumable chunks and dropped as much unnecessary stuff as I can. I've also tried to sync the device trees as much as possible with the support that will land in Linux 6.0 although there are still some differences Changes in v6: - Set CONFIG_DEFAULT_DEVICE_TREE and CONFIG_TEXT_BASE Changes in v5: - Minor white space cleanups - Collect review from Stefan - Minor fixup for checkpatch.pl complaint - Remove unused bpard_{early,late}_init{,_r,_f} functions - Remove CPNFIG_PCI and CONFIG_E1000 as the PCI interface is not currently working (requires more vendor code) - Use CONFIG_OF_SEPARATE instead of CONFIG_OF_EMBED Changes in v4: - Collect r-by from Stefan - Remove unused mvebu_get_nand_clock() (will return in a later series) - Remove unnecessary #ifdefs - Misc style cleanups - Replace CONFIG_MVEBU_SAR with simpler code implemented directly in soc.c based around get_sar_freq which the 32-bit platforms already use. - Move CONFIG_DISPLAY_BOARDINFO_LATE and CONFIG_ENV_OVERWRITE to the defconfig. - Remove CONFIG_BAUDRATE as this is already set in the default config - Remove CONFIG_USB_MAX_CONTROLLER_COUNT as this is not needed with DM_USB - Remove CONFIG_PREBOOT as we don't have anything to run - Remove commented out CONFIG_BOARD_EARLY_INIT_R - Remove DEBUG_UART configuration - Remove unnecessary console environment variable - Remove CONFIG_MVEBU_SAR Changes in v3: - Remove unnecessary changes to RX descriptor handling - Use dev_get_dma_range() to parse dma-ranges property from parent device. - Remove unnecessary dma-ranges property from ethernet nodes (mvneta now correctly parses the property from the parent node). - Keep soc_print_clock_info and soc_print_device_info local to alleycat5. - Remove MMC and UBIFS distroboot options (MMC driver is not currently functional, NAND is not populated on the RD-AC5X board) - Remove unnecessary Ethernet configuration - Remove unnecessary NAND configuration - Remove memory node from dts so the value passed by the DDR FW will be used Changes in v2: - Use distro boot by default - remove unnecessary SPI-NOR partitions Chris Packham (6): arm: mvebu: Don't use CONFIG_TIMER on ARM64 net: mvneta: Add support for AlleyCat5 usb: ehci: ehci-marvell: Support for marvell,ac5-ehci pinctrl: mvebu: Add AlleyCat5 support arm: mvebu: Support for 98DX25xx/98DX35xx SoC arm: mvebu: Add RD-AC5X board arch/arm/Kconfig | 2 +- arch/arm/dts/Makefile | 3 +- arch/arm/dts/ac5-98dx25xx.dtsi | 277 +++++++++++++++++++ arch/arm/dts/ac5-98dx35xx-rd.dts | 129 +++++++++ arch/arm/dts/ac5-98dx35xx.dtsi | 17 ++ arch/arm/mach-mvebu/Kconfig | 13 +- arch/arm/mach-mvebu/Makefile | 1 + arch/arm/mach-mvebu/alleycat5/Makefile | 8 + arch/arm/mach-mvebu/alleycat5/cpu.c | 124 +++++++++ arch/arm/mach-mvebu/alleycat5/soc.c | 298 +++++++++++++++++++++ arch/arm/mach-mvebu/alleycat5/soc.h | 7 + arch/arm/mach-mvebu/arm64-common.c | 5 + arch/arm/mach-mvebu/include/mach/cpu.h | 4 + board/Marvell/mvebu_alleycat-5/MAINTAINERS | 6 + board/Marvell/mvebu_alleycat-5/Makefile | 3 + board/Marvell/mvebu_alleycat-5/board.c | 13 + configs/mvebu_ac5_rd_defconfig | 81 ++++++ drivers/net/Kconfig | 2 +- drivers/net/mvneta.c | 43 ++- drivers/pinctrl/mvebu/Kconfig | 2 +- drivers/usb/host/Kconfig | 1 + drivers/usb/host/ehci-marvell.c | 53 +++- include/configs/mvebu_alleycat-5.h | 42 +++ 23 files changed, 1120 insertions(+), 14 deletions(-) create mode 100644 arch/arm/dts/ac5-98dx25xx.dtsi create mode 100644 arch/arm/dts/ac5-98dx35xx-rd.dts create mode 100644 arch/arm/dts/ac5-98dx35xx.dtsi create mode 100644 arch/arm/mach-mvebu/alleycat5/Makefile create mode 100644 arch/arm/mach-mvebu/alleycat5/cpu.c create mode 100644 arch/arm/mach-mvebu/alleycat5/soc.c create mode 100644 arch/arm/mach-mvebu/alleycat5/soc.h create mode 100644 board/Marvell/mvebu_alleycat-5/MAINTAINERS create mode 100644 board/Marvell/mvebu_alleycat-5/Makefile create mode 100644 board/Marvell/mvebu_alleycat-5/board.c create mode 100644 configs/mvebu_ac5_rd_defconfig create mode 100644 include/configs/mvebu_alleycat-5.h -- 2.38.1