From: Yu Chien Peter Lin <peterlin@andestech.com>
To: <u-boot@lists.denx.de>
Cc: <samuel@sholland.org>, Yu Chien Peter Lin <peterlin@andestech.com>
Subject: [PATCH v2] riscv: Fix detecting FPU support in standard extension
Date: Sat, 5 Nov 2022 14:02:14 +0800 [thread overview]
Message-ID: <20221105060214.2526-1-peterlin@andestech.com> (raw)
We should check the string until it hits underscore, in case it
searches for the letters in the custom extension. For example,
"rv64imac_xandes" will be treated as D extension support since
there is a "d" in "andes", resulting illegal instruction caused
by initializing FCSR.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
---
arch/riscv/cpu/cpu.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 52ab02519f..d34c8efce0 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -36,6 +36,7 @@ static inline bool supports_extension(char ext)
#ifdef CONFIG_CPU
struct udevice *dev;
char desc[32];
+ int i;
uclass_find_first_device(UCLASS_CPU, &dev);
if (!dev) {
@@ -43,9 +44,16 @@ static inline bool supports_extension(char ext)
return false;
}
if (!cpu_get_desc(dev, desc, sizeof(desc))) {
- /* skip the first 4 characters (rv32|rv64) */
- if (strchr(desc + 4, ext))
- return true;
+ /*
+ * skip the first 4 characters (rv32|rv64) and
+ * check until underscore
+ */
+ for (i = 4; i < sizeof(desc); i++) {
+ if (desc[i] == '_' || desc[i] == '\0')
+ break;
+ if (desc[i] == ext)
+ return true;
+ }
}
return false;
--
2.34.1
next reply other threads:[~2022-11-05 6:02 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-05 6:02 Yu Chien Peter Lin [this message]
[not found] ` <HK0PR03MB2994D5179CFED4510DB0DCCDC1019@HK0PR03MB2994.apcprd03.prod.outlook.com>
2022-11-10 7:45 ` [PATCH v2] riscv: Fix detecting FPU support in standard extension Rick Chen
2022-11-10 12:30 ` Padmarao.Begari
2022-11-13 21:47 ` Samuel Holland
2022-11-14 8:48 ` Yu-Chien Peter Lin
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