From: Jit Loon Lim <jit.loon.lim@intel.com>
To: u-boot@lists.denx.de
Cc: Jagan Teki <jagan@amarulasolutions.com>,
Vignesh R <vigneshr@ti.com>, Marek <marex@denx.de>,
Simon <simon.k.r.goldschmidt@gmail.com>,
Tien Fong <tien.fong.chee@intel.com>,
Kok Kiang <kok.kiang.hea@intel.com>,
Siew Chin <elly.siew.chin.lim@intel.com>,
Sin Hui <sin.hui.kho@intel.com>, Raaj <raaj.lokanathan@intel.com>,
Dinesh <dinesh.maniyam@intel.com>,
Boon Khai <boon.khai.ng@intel.com>,
Alif <alif.zakuan.yuslaimi@intel.com>,
Teik Heng <teik.heng.chong@intel.com>,
Hazim <muhammad.hazim.izzat.zamri@intel.com>,
Jit Loon Lim <jit.loon.lim@intel.com>,
Sieu Mun Tang <sieu.mun.tang@intel.com>
Subject: [PATCH] ddr: altera: n5x: Enhance driver to support LPDDR4
Date: Tue, 22 Nov 2022 09:13:45 +0800 [thread overview]
Message-ID: <20221122011345.14286-1-jit.loon.lim@intel.com> (raw)
From: Tien Fong Chee <tien.fong.chee@intel.com>
Enhance driver to common DDR driver for supporting both DDR4 and LPDDR4.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi
index 502da36bd8..6c1d25fa05 100644
--- a/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi
@@ -15,7 +15,11 @@
memory {
/*
+<<<<<<< HEAD
* Memory type: DDR4 (non-interleaving mode)
+=======
+ * Memory type: DDR4
+>>>>>>> ddr: altera: n5x: Enhance driver to support LPDDR4
* 16GB
* <0 0x00000000 0 0x80000000>,
* <4 0x80000000 3 0x80000000>;
--
2.26.2
reply other threads:[~2022-11-22 1:13 UTC|newest]
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