From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18EBDC433FE for ; Tue, 22 Nov 2022 14:19:11 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B6B12852A8; Tue, 22 Nov 2022 15:19:09 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="VP6j318r"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id D4EC4852A8; Tue, 22 Nov 2022 15:19:07 +0100 (CET) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7B6A285071 for ; Tue, 22 Nov 2022 15:19:01 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=jitloonl@ecsmtp.png.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669126741; x=1700662741; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6guoSwVH+rBM4iz+eHpP3ZSybcsPSsggyqJv8k8HTTo=; b=VP6j318rRqFl1C3SfWZLdSjQfYJGgfTX93zMQpwU816Z5D51ZouuUbyN yFSr6UOW6rTGFWiLeN3M9F2FM6Q01BvYYJLFxgX5M7U1Eo839D2BuBgZQ m8+1JwxFRV/USxOu8tmvoufCRseXGWLER4p+NVbdopNiO4rRNhjnMqBx+ OI6n31pMyJYuWu5GM7/s1o0g2a7+CIKkD6sNtH3TXcGh+tMjRy7fhbuFh xZL1LwUSoDqWHjDmvwgpEovnEQPhrDiXBXp6eF+HluBpk/Xt4CsymUyCZ Hq75Kfd7EF7xUP8TR+szjVVb7EVYlagcX8NEQ8uGLnB6l0qDs65VATg1D Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10539"; a="313853971" X-IronPort-AV: E=Sophos;i="5.96,184,1665471600"; d="scan'208";a="313853971" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2022 06:18:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10539"; a="816113233" X-IronPort-AV: E=Sophos;i="5.96,184,1665471600"; d="scan'208";a="816113233" Received: from pglmail07.png.intel.com ([10.221.193.207]) by orsmga005.jf.intel.com with ESMTP; 22 Nov 2022 06:18:41 -0800 Received: from localhost (pgli0028.png.intel.com [10.221.84.177]) by pglmail07.png.intel.com (Postfix) with ESMTP id F255A355A; Tue, 22 Nov 2022 22:18:38 +0800 (+08) Received: by localhost (Postfix, from userid 12048045) id F0B52E00214; Tue, 22 Nov 2022 22:18:38 +0800 (+08) From: Jit Loon Lim To: u-boot@lists.denx.de Cc: Jagan Teki , Vignesh R , Marek , Simon , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Jit Loon Lim , Sieu Mun Tang Subject: [PATCH 2/2] drivers: watchdog: Enhance watchdog support in SPL for N5X Date: Tue, 22 Nov 2022 22:18:37 +0800 Message-Id: <20221122141837.24055-2-jit.loon.lim@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20221122141837.24055-1-jit.loon.lim@intel.com> References: <20221122141837.24055-1-jit.loon.lim@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Siew Chin Lim Enable watchdog before initializing other component (example: DDR). Thus, watchdog need to be fully executed in onchip ram. Signed-off-by: Siew Chin Lim Signed-off-by: Jit Loon Lim --- arch/arm/mach-socfpga/spl_n5x.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-socfpga/spl_n5x.c b/arch/arm/mach-socfpga/spl_n5x.c index d056871d29..c56b5a1b88 100644 --- a/arch/arm/mach-socfpga/spl_n5x.c +++ b/arch/arm/mach-socfpga/spl_n5x.c @@ -21,6 +21,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -39,13 +41,6 @@ void board_init_f(ulong dummy) writel(SYSMGR_WDDBG_PAUSE_ALL_CPU, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG); -#ifdef CONFIG_HW_WATCHDOG - /* Enable watchdog before initializing the HW */ - socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1); - socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0); - hw_watchdog_init(); -#endif - /* ensure all processors are not released prior Linux boot */ writeq(0, CPU_RELEASE_ADDR); @@ -67,6 +62,14 @@ void board_init_f(ulong dummy) hang(); } + /* + * Enable watchdog as early as possible before initializing other + * component. Watchdog need to be enabled after clock driver because + * it will retrieve the clock frequency from clock driver. + */ + if (CONFIG_IS_ENABLED(WDT)) + initr_watchdog(); + print_reset_info(); cm_print_clock_quick_summary(); -- 2.26.2