[PATCH 118/149] global: Migrate CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG

Tom Rini
2022-12-04T15:28:48Z

Perform a simple rename of CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG_SH_ETHER_CACHE_WRITEBACK

Signed-off-by: Tom Rini <trini@konsulko.com>
---
README | 2 +-
drivers/net/sh_eth.c | 2 +-
include/configs/alt.h | 2 +-
include/configs/condor.h | 2 +-
include/configs/gose.h | 2 +-
include/configs/grpeach.h | 2 +-
include/configs/koelsch.h | 2 +-
include/configs/lager.h | 2 +-
include/configs/porter.h | 2 +-
include/configs/silk.h | 2 +-
include/configs/stout.h | 2 +-
11 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/README b/README
index 2d3a48e88a59..5f688d70f32f 100644
--- a/README
+++ b/README
@@ -547,7 +547,7 @@ The following options need to be configured:
CONFIG_SH_ETHER_PHY_ADDR
Define the ETH PHY's address

- CONFIG_SH_ETHER_CACHE_WRITEBACK
+ CFG_SH_ETHER_CACHE_WRITEBACK
If this option is set, the driver enables cache flush.

- TPM Support:
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 63b21969d5cc..0053733075ed 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -37,7 +37,7 @@
# error "Please define CONFIG_SH_ETHER_PHY_ADDR"
#endif

-#if defined(CONFIG_SH_ETHER_CACHE_WRITEBACK) && \
+#if defined(CFG_SH_ETHER_CACHE_WRITEBACK) && \
!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
#define flush_cache_wback(addr, len) \
flush_dcache_range((unsigned long)addr, \
diff --git a/include/configs/alt.h b/include/configs/alt.h
index 7a29157ef440..2b7832527347 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -24,7 +24,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

diff --git a/include/configs/condor.h b/include/configs/condor.h
index fa3edef9b300..3f99cbf9dab9 100644
--- a/include/configs/condor.h
+++ b/include/configs/condor.h
@@ -17,7 +17,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

diff --git a/include/configs/gose.h b/include/configs/gose.h
index e54f4b24e048..45a537341b0e 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -23,7 +23,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index 5ae17f70e909..3fde61407094 100644
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -20,7 +20,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index 1d8aa6def88f..b3b6f03e08d4 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -23,7 +23,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

diff --git a/include/configs/lager.h b/include/configs/lager.h
index bb8cc5fecb7a..16d15ccdd913 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -24,7 +24,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

diff --git a/include/configs/porter.h b/include/configs/porter.h
index 143e9a4672f1..f217141af8c0 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -25,7 +25,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

diff --git a/include/configs/silk.h b/include/configs/silk.h
index 2d1e23c27451..09c23d379e98 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -25,7 +25,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

diff --git a/include/configs/stout.h b/include/configs/stout.h
index 9e05a7ae6f96..dd44b3e6d00a 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -29,7 +29,7 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

--
2.25.1