[PoC 186/241] global: Migrate CONFIG_SLIC to CFG

Tom Rini
2022-11-20T14:18:54Z

board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +-
include/configs/p1_p2_rdb_pc.h | 4 ++--
scripts/config_whitelist.txt | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index ab7972442970..9e26c201b7a8 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -187,7 +187,7 @@ void board_gpio_init(void)
setbits_be32(&pgpio->gpdat, 0x00080000);
#endif

-#ifdef CONFIG_SLIC
+#ifdef CFG_SLIC
/* reset SLIC */
setbits_be32(&pgpio->gpdir, 0x00040000);
setbits_be32(&pgpio->gpdat, 0x00040000);
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index ccc000227b19..4ab2efd528d1 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -13,7 +13,7 @@
#include <linux/stringify.h>

#if defined(CONFIG_TARGET_P1020RDB_PC)
-#define CONFIG_SLIC
+#define CFG_SLIC
#define __SW_BOOT_MASK 0x03
#define __SW_BOOT_NOR 0x5c
#define __SW_BOOT_SPI 0x1c
@@ -42,7 +42,7 @@
* 011101 800 800 400 667 PCIe-2 Core0 boot; Core1 hold-off
*/
#if defined(CONFIG_TARGET_P1020RDB_PD)
-#define CONFIG_SLIC
+#define CFG_SLIC
#define __SW_BOOT_MASK 0x03
#define __SW_BOOT_NOR 0x64
#define __SW_BOOT_SPI 0x34
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 8a23b09ef5c0..c1129ffb9e53 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -195,7 +195,7 @@ CFG_SH_ETHER_PHY_ADDR
CFG_SH_ETHER_PHY_MODE
CFG_SH_ETHER_USE_PORT
CFG_SH_QSPI_BASE
-CONFIG_SLIC
+CFG_SLIC
CONFIG_SMDK5420
CONFIG_SMP_PEN_ADDR
CONFIG_SOCRATES
--
2.25.1