From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1AD92C352A1 for ; Sat, 3 Dec 2022 17:15:59 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A530A851E4; Sat, 3 Dec 2022 18:15:57 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 08615851E4; Sat, 3 Dec 2022 18:15:57 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id AE434851DF for ; Sat, 3 Dec 2022 18:15:52 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 93DB623A; Sat, 3 Dec 2022 09:15:58 -0800 (PST) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B75193F67D; Sat, 3 Dec 2022 09:15:50 -0800 (PST) Date: Sat, 3 Dec 2022 17:14:14 +0000 From: Andre Przywara To: Samuel Holland Cc: Jernej Skrabec , Anatolij Gustschin , Jagan Teki , Lukasz Majewski , Sean Anderson , u-boot@lists.denx.de Subject: Re: [PATCH 1/5] clk: sunxi: Add DE2 display-related clocks/resets Message-ID: <20221203171414.18ff93ee@slackpad.lan> In-Reply-To: <20221128070229.4394-2-samuel@sholland.org> References: <20221128070229.4394-1-samuel@sholland.org> <20221128070229.4394-2-samuel@sholland.org> Organization: Arm Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On Mon, 28 Nov 2022 01:02:24 -0600 Samuel Holland wrote: Hi, > Add clock/reset definitions for display-related peripherals, including > the display engine, TCONs, and DSI and HDMI encoders, so those drivers > can be converted to DM clock consumers instead of directly manipulating > the CCU registers. Thanks for that. Compared all register addresses and bit locations against their respective manual. > Signed-off-by: Samuel Holland Reviewed-by: Andre Przywara Cheers, Andre > --- > > drivers/clk/sunxi/clk_a64.c | 22 ++++++++++++++++++++++ > drivers/clk/sunxi/clk_a83t.c | 22 ++++++++++++++++++++++ > drivers/clk/sunxi/clk_h3.c | 17 +++++++++++++++++ > drivers/clk/sunxi/clk_h6.c | 21 +++++++++++++++++++++ > drivers/clk/sunxi/clk_h616.c | 21 +++++++++++++++++++++ > drivers/clk/sunxi/clk_r40.c | 29 +++++++++++++++++++++++++++++ > drivers/clk/sunxi/clk_v3s.c | 9 +++++++++ > 7 files changed, 141 insertions(+) > > diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c > index 8c81b1ac453..136ba89293d 100644 > --- a/drivers/clk/sunxi/clk_a64.c > +++ b/drivers/clk/sunxi/clk_a64.c > @@ -16,6 +16,7 @@ > static const struct ccu_clk_gate a64_gates[] = { > [CLK_PLL_PERIPH0] = GATE(0x028, BIT(31)), > > + [CLK_BUS_MIPI_DSI] = GATE(0x060, BIT(1)), > [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), > [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), > [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), > @@ -28,6 +29,11 @@ static const struct ccu_clk_gate a64_gates[] = { > [CLK_BUS_OHCI0] = GATE(0x060, BIT(28)), > [CLK_BUS_OHCI1] = GATE(0x060, BIT(29)), > > + [CLK_BUS_TCON0] = GATE(0x064, BIT(3)), > + [CLK_BUS_TCON1] = GATE(0x064, BIT(4)), > + [CLK_BUS_HDMI] = GATE(0x064, BIT(11)), > + [CLK_BUS_DE] = GATE(0x064, BIT(12)), > + > [CLK_BUS_PIO] = GATE(0x068, BIT(5)), > > [CLK_BUS_I2C0] = GATE(0x06c, BIT(0)), > @@ -48,6 +54,15 @@ static const struct ccu_clk_gate a64_gates[] = { > [CLK_USB_HSIC_12M] = GATE(0x0cc, BIT(11)), > [CLK_USB_OHCI0] = GATE(0x0cc, BIT(16)), > [CLK_USB_OHCI1] = GATE(0x0cc, BIT(17)), > + > + [CLK_DE] = GATE(0x104, BIT(31)), > + [CLK_TCON0] = GATE(0x118, BIT(31)), > + [CLK_TCON1] = GATE(0x11c, BIT(31)), > + > + [CLK_HDMI] = GATE(0x150, BIT(31)), > + [CLK_HDMI_DDC] = GATE(0x154, BIT(31)), > + > + [CLK_DSI_DPHY] = GATE(0x168, BIT(15)), > }; > > static const struct ccu_reset a64_resets[] = { > @@ -55,6 +70,7 @@ static const struct ccu_reset a64_resets[] = { > [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), > [RST_USB_HSIC] = RESET(0x0cc, BIT(2)), > > + [RST_BUS_MIPI_DSI] = RESET(0x2c0, BIT(1)), > [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), > [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), > [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), > @@ -67,6 +83,12 @@ static const struct ccu_reset a64_resets[] = { > [RST_BUS_OHCI0] = RESET(0x2c0, BIT(28)), > [RST_BUS_OHCI1] = RESET(0x2c0, BIT(29)), > > + [RST_BUS_TCON0] = RESET(0x2c4, BIT(3)), > + [RST_BUS_TCON1] = RESET(0x2c4, BIT(4)), > + [RST_BUS_HDMI0] = RESET(0x2c4, BIT(10)), > + [RST_BUS_HDMI1] = RESET(0x2c4, BIT(11)), > + [RST_BUS_DE] = RESET(0x2c4, BIT(12)), > + > [RST_BUS_I2C0] = RESET(0x2d8, BIT(0)), > [RST_BUS_I2C1] = RESET(0x2d8, BIT(1)), > [RST_BUS_I2C2] = RESET(0x2d8, BIT(2)), > diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c > index 3562da61d14..d5af37b3d78 100644 > --- a/drivers/clk/sunxi/clk_a83t.c > +++ b/drivers/clk/sunxi/clk_a83t.c > @@ -14,6 +14,7 @@ > #include > > static struct ccu_clk_gate a83t_gates[] = { > + [CLK_BUS_MIPI_DSI] = GATE(0x060, BIT(1)), > [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), > [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), > [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), > @@ -25,6 +26,11 @@ static struct ccu_clk_gate a83t_gates[] = { > [CLK_BUS_EHCI1] = GATE(0x060, BIT(27)), > [CLK_BUS_OHCI0] = GATE(0x060, BIT(29)), > > + [CLK_BUS_TCON0] = GATE(0x064, BIT(4)), > + [CLK_BUS_TCON1] = GATE(0x064, BIT(5)), > + [CLK_BUS_HDMI] = GATE(0x064, BIT(11)), > + [CLK_BUS_DE] = GATE(0x064, BIT(12)), > + > [CLK_BUS_PIO] = GATE(0x068, BIT(5)), > > [CLK_BUS_I2C0] = GATE(0x06c, BIT(0)), > @@ -44,6 +50,15 @@ static struct ccu_clk_gate a83t_gates[] = { > [CLK_USB_HSIC] = GATE(0x0cc, BIT(10)), > [CLK_USB_HSIC_12M] = GATE(0x0cc, BIT(11)), > [CLK_USB_OHCI0] = GATE(0x0cc, BIT(16)), > + > + [CLK_TCON0] = GATE(0x118, BIT(31)), > + [CLK_TCON1] = GATE(0x11c, BIT(31)), > + > + [CLK_HDMI] = GATE(0x150, BIT(31)), > + [CLK_HDMI_SLOW] = GATE(0x154, BIT(31)), > + > + [CLK_MIPI_DSI0] = GATE(0x168, BIT(31)), > + [CLK_MIPI_DSI1] = GATE(0x16c, BIT(31)), > }; > > static struct ccu_reset a83t_resets[] = { > @@ -51,6 +66,7 @@ static struct ccu_reset a83t_resets[] = { > [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), > [RST_USB_HSIC] = RESET(0x0cc, BIT(2)), > > + [RST_BUS_MIPI_DSI] = RESET(0x2c0, BIT(1)), > [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), > [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), > [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), > @@ -62,6 +78,12 @@ static struct ccu_reset a83t_resets[] = { > [RST_BUS_EHCI1] = RESET(0x2c0, BIT(27)), > [RST_BUS_OHCI0] = RESET(0x2c0, BIT(29)), > > + [RST_BUS_TCON0] = RESET(0x2c4, BIT(4)), > + [RST_BUS_TCON1] = RESET(0x2c4, BIT(5)), > + [RST_BUS_HDMI0] = RESET(0x2c4, BIT(10)), > + [RST_BUS_HDMI1] = RESET(0x2c4, BIT(11)), > + [RST_BUS_DE] = RESET(0x2c4, BIT(12)), > + > [RST_BUS_I2C0] = RESET(0x2d8, BIT(0)), > [RST_BUS_I2C1] = RESET(0x2d8, BIT(1)), > [RST_BUS_I2C2] = RESET(0x2d8, BIT(2)), > diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c > index 17ab3b5c278..213ab510ed5 100644 > --- a/drivers/clk/sunxi/clk_h3.c > +++ b/drivers/clk/sunxi/clk_h3.c > @@ -32,6 +32,11 @@ static struct ccu_clk_gate h3_gates[] = { > [CLK_BUS_OHCI2] = GATE(0x060, BIT(30)), > [CLK_BUS_OHCI3] = GATE(0x060, BIT(31)), > > + [CLK_BUS_TCON0] = GATE(0x064, BIT(3)), > + [CLK_BUS_TCON1] = GATE(0x064, BIT(4)), > + [CLK_BUS_HDMI] = GATE(0x064, BIT(11)), > + [CLK_BUS_DE] = GATE(0x064, BIT(12)), > + > [CLK_BUS_PIO] = GATE(0x068, BIT(5)), > > [CLK_BUS_I2C0] = GATE(0x06c, BIT(0)), > @@ -55,6 +60,12 @@ static struct ccu_clk_gate h3_gates[] = { > [CLK_USB_OHCI1] = GATE(0x0cc, BIT(17)), > [CLK_USB_OHCI2] = GATE(0x0cc, BIT(18)), > [CLK_USB_OHCI3] = GATE(0x0cc, BIT(19)), > + > + [CLK_DE] = GATE(0x104, BIT(31)), > + [CLK_TCON0] = GATE(0x118, BIT(31)), > + > + [CLK_HDMI] = GATE(0x150, BIT(31)), > + [CLK_HDMI_DDC] = GATE(0x154, BIT(31)), > }; > > static struct ccu_reset h3_resets[] = { > @@ -79,6 +90,12 @@ static struct ccu_reset h3_resets[] = { > [RST_BUS_OHCI2] = RESET(0x2c0, BIT(30)), > [RST_BUS_OHCI3] = RESET(0x2c0, BIT(31)), > > + [RST_BUS_TCON0] = RESET(0x2c4, BIT(3)), > + [RST_BUS_TCON1] = RESET(0x2c4, BIT(4)), > + [RST_BUS_HDMI0] = RESET(0x2c4, BIT(10)), > + [RST_BUS_HDMI1] = RESET(0x2c4, BIT(11)), > + [RST_BUS_DE] = RESET(0x2c4, BIT(12)), > + > [RST_BUS_EPHY] = RESET(0x2c8, BIT(2)), > > [RST_BUS_I2C0] = RESET(0x2d8, BIT(0)), > diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c > index 041bc5e80ed..24eb9725dbc 100644 > --- a/drivers/clk/sunxi/clk_h6.c > +++ b/drivers/clk/sunxi/clk_h6.c > @@ -18,6 +18,9 @@ static struct ccu_clk_gate h6_gates[] = { > > [CLK_APB1] = GATE_DUMMY, > > + [CLK_DE] = GATE(0x600, BIT(31)), > + [CLK_BUS_DE] = GATE(0x60c, BIT(0)), > + > [CLK_BUS_MMC0] = GATE(0x84c, BIT(0)), > [CLK_BUS_MMC1] = GATE(0x84c, BIT(1)), > [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)), > @@ -55,9 +58,21 @@ static struct ccu_clk_gate h6_gates[] = { > [CLK_BUS_XHCI] = GATE(0xa8c, BIT(5)), > [CLK_BUS_EHCI3] = GATE(0xa8c, BIT(7)), > [CLK_BUS_OTG] = GATE(0xa8c, BIT(8)), > + > + [CLK_HDMI] = GATE(0xb00, BIT(31)), > + [CLK_HDMI_SLOW] = GATE(0xb04, BIT(31)), > + [CLK_HDMI_CEC] = GATE(0xb10, BIT(31)), > + [CLK_BUS_HDMI] = GATE(0xb1c, BIT(0)), > + [CLK_BUS_TCON_TOP] = GATE(0xb5c, BIT(0)), > + [CLK_TCON_LCD0] = GATE(0xb60, BIT(31)), > + [CLK_BUS_TCON_LCD0] = GATE(0xb7c, BIT(0)), > + [CLK_TCON_TV0] = GATE(0xb80, BIT(31)), > + [CLK_BUS_TCON_TV0] = GATE(0xb9c, BIT(0)), > }; > > static struct ccu_reset h6_resets[] = { > + [RST_BUS_DE] = RESET(0x60c, BIT(16)), > + > [RST_BUS_MMC0] = RESET(0x84c, BIT(16)), > [RST_BUS_MMC1] = RESET(0x84c, BIT(17)), > [RST_BUS_MMC2] = RESET(0x84c, BIT(18)), > @@ -89,6 +104,12 @@ static struct ccu_reset h6_resets[] = { > [RST_BUS_XHCI] = RESET(0xa8c, BIT(21)), > [RST_BUS_EHCI3] = RESET(0xa8c, BIT(23)), > [RST_BUS_OTG] = RESET(0xa8c, BIT(24)), > + > + [RST_BUS_HDMI] = RESET(0xb1c, BIT(16)), > + [RST_BUS_HDMI_SUB] = RESET(0xb1c, BIT(17)), > + [RST_BUS_TCON_TOP] = RESET(0xb5c, BIT(16)), > + [RST_BUS_TCON_LCD0] = RESET(0xb7c, BIT(16)), > + [RST_BUS_TCON_TV0] = RESET(0xb9c, BIT(16)), > }; > > const struct ccu_desc h6_ccu_desc = { > diff --git a/drivers/clk/sunxi/clk_h616.c b/drivers/clk/sunxi/clk_h616.c > index 964636d7281..88d6bf3420d 100644 > --- a/drivers/clk/sunxi/clk_h616.c > +++ b/drivers/clk/sunxi/clk_h616.c > @@ -17,6 +17,9 @@ static struct ccu_clk_gate h616_gates[] = { > > [CLK_APB1] = GATE_DUMMY, > > + [CLK_DE] = GATE(0x600, BIT(31)), > + [CLK_BUS_DE] = GATE(0x60c, BIT(0)), > + > [CLK_BUS_MMC0] = GATE(0x84c, BIT(0)), > [CLK_BUS_MMC1] = GATE(0x84c, BIT(1)), > [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)), > @@ -64,9 +67,21 @@ static struct ccu_clk_gate h616_gates[] = { > [CLK_BUS_EHCI2] = GATE(0xa8c, BIT(6)), > [CLK_BUS_EHCI3] = GATE(0xa8c, BIT(7)), > [CLK_BUS_OTG] = GATE(0xa8c, BIT(8)), > + > + [CLK_HDMI] = GATE(0xb00, BIT(31)), > + [CLK_HDMI_SLOW] = GATE(0xb04, BIT(31)), > + [CLK_HDMI_CEC] = GATE(0xb10, BIT(31)), > + [CLK_BUS_HDMI] = GATE(0xb1c, BIT(0)), > + [CLK_BUS_TCON_TOP] = GATE(0xb5c, BIT(0)), > + [CLK_TCON_TV0] = GATE(0xb80, BIT(31)), > + [CLK_TCON_TV1] = GATE(0xb84, BIT(31)), > + [CLK_BUS_TCON_TV0] = GATE(0xb9c, BIT(0)), > + [CLK_BUS_TCON_TV1] = GATE(0xb9c, BIT(1)), > }; > > static struct ccu_reset h616_resets[] = { > + [RST_BUS_DE] = RESET(0x60c, BIT(16)), > + > [RST_BUS_MMC0] = RESET(0x84c, BIT(16)), > [RST_BUS_MMC1] = RESET(0x84c, BIT(17)), > [RST_BUS_MMC2] = RESET(0x84c, BIT(18)), > @@ -107,6 +122,12 @@ static struct ccu_reset h616_resets[] = { > [RST_BUS_EHCI2] = RESET(0xa8c, BIT(22)), > [RST_BUS_EHCI3] = RESET(0xa8c, BIT(23)), > [RST_BUS_OTG] = RESET(0xa8c, BIT(24)), > + > + [RST_BUS_HDMI] = RESET(0xb1c, BIT(16)), > + [RST_BUS_HDMI_SUB] = RESET(0xb1c, BIT(17)), > + [RST_BUS_TCON_TOP] = RESET(0xb5c, BIT(16)), > + [RST_BUS_TCON_TV0] = RESET(0xb9c, BIT(16)), > + [RST_BUS_TCON_TV1] = RESET(0xb9c, BIT(17)), > }; > > const struct ccu_desc h616_ccu_desc = { > diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c > index ef743d65b7f..630e80d2b4e 100644 > --- a/drivers/clk/sunxi/clk_r40.c > +++ b/drivers/clk/sunxi/clk_r40.c > @@ -14,6 +14,7 @@ > #include > > static struct ccu_clk_gate r40_gates[] = { > + [CLK_BUS_MIPI_DSI] = GATE(0x060, BIT(1)), > [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), > [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), > [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), > @@ -30,7 +31,15 @@ static struct ccu_clk_gate r40_gates[] = { > [CLK_BUS_OHCI1] = GATE(0x060, BIT(30)), > [CLK_BUS_OHCI2] = GATE(0x060, BIT(31)), > > + [CLK_BUS_HDMI0] = GATE(0x064, BIT(10)), > + [CLK_BUS_HDMI1] = GATE(0x064, BIT(11)), > + [CLK_BUS_DE] = GATE(0x064, BIT(12)), > [CLK_BUS_GMAC] = GATE(0x064, BIT(17)), > + [CLK_BUS_TCON_LCD0] = GATE(0x064, BIT(26)), > + [CLK_BUS_TCON_LCD1] = GATE(0x064, BIT(27)), > + [CLK_BUS_TCON_TV0] = GATE(0x064, BIT(28)), > + [CLK_BUS_TCON_TV1] = GATE(0x064, BIT(29)), > + [CLK_BUS_TCON_TOP] = GATE(0x064, BIT(30)), > > [CLK_BUS_PIO] = GATE(0x068, BIT(5)), > > @@ -59,6 +68,17 @@ static struct ccu_clk_gate r40_gates[] = { > [CLK_USB_OHCI0] = GATE(0x0cc, BIT(16)), > [CLK_USB_OHCI1] = GATE(0x0cc, BIT(17)), > [CLK_USB_OHCI2] = GATE(0x0cc, BIT(18)), > + > + [CLK_DE] = GATE(0x104, BIT(31)), > + [CLK_TCON_LCD0] = GATE(0x110, BIT(31)), > + [CLK_TCON_LCD1] = GATE(0x114, BIT(31)), > + [CLK_TCON_TV0] = GATE(0x118, BIT(31)), > + [CLK_TCON_TV1] = GATE(0x11c, BIT(31)), > + > + [CLK_HDMI] = GATE(0x150, BIT(31)), > + [CLK_HDMI_SLOW] = GATE(0x154, BIT(31)), > + > + [CLK_DSI_DPHY] = GATE(0x168, BIT(15)), > }; > > static struct ccu_reset r40_resets[] = { > @@ -66,6 +86,7 @@ static struct ccu_reset r40_resets[] = { > [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), > [RST_USB_PHY2] = RESET(0x0cc, BIT(2)), > > + [RST_BUS_MIPI_DSI] = RESET(0x2c0, BIT(1)), > [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), > [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), > [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), > @@ -82,7 +103,15 @@ static struct ccu_reset r40_resets[] = { > [RST_BUS_OHCI1] = RESET(0x2c0, BIT(30)), > [RST_BUS_OHCI2] = RESET(0x2c0, BIT(31)), > > + [RST_BUS_HDMI0] = RESET(0x2c4, BIT(10)), > + [RST_BUS_HDMI1] = RESET(0x2c4, BIT(11)), > + [RST_BUS_DE] = RESET(0x2c4, BIT(12)), > [RST_BUS_GMAC] = RESET(0x2c4, BIT(17)), > + [RST_BUS_TCON_LCD0] = RESET(0x2c4, BIT(26)), > + [RST_BUS_TCON_LCD1] = RESET(0x2c4, BIT(27)), > + [RST_BUS_TCON_TV0] = RESET(0x2c4, BIT(28)), > + [RST_BUS_TCON_TV1] = RESET(0x2c4, BIT(29)), > + [RST_BUS_TCON_TOP] = RESET(0x2c4, BIT(30)), > > [RST_BUS_I2C0] = RESET(0x2d8, BIT(0)), > [RST_BUS_I2C1] = RESET(0x2d8, BIT(1)), > diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c > index f2fd11eac2c..6524c13540e 100644 > --- a/drivers/clk/sunxi/clk_v3s.c > +++ b/drivers/clk/sunxi/clk_v3s.c > @@ -20,6 +20,9 @@ static struct ccu_clk_gate v3s_gates[] = { > [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), > [CLK_BUS_OTG] = GATE(0x060, BIT(24)), > > + [CLK_BUS_TCON0] = GATE(0x064, BIT(4)), > + [CLK_BUS_DE] = GATE(0x064, BIT(12)), > + > [CLK_BUS_PIO] = GATE(0x068, BIT(5)), > > [CLK_BUS_I2C0] = GATE(0x06c, BIT(0)), > @@ -31,6 +34,9 @@ static struct ccu_clk_gate v3s_gates[] = { > [CLK_SPI0] = GATE(0x0a0, BIT(31)), > > [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), > + > + [CLK_DE] = GATE(0x104, BIT(31)), > + [CLK_TCON0] = GATE(0x118, BIT(31)), > }; > > static struct ccu_reset v3s_resets[] = { > @@ -42,6 +48,9 @@ static struct ccu_reset v3s_resets[] = { > [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), > [RST_BUS_OTG] = RESET(0x2c0, BIT(24)), > > + [RST_BUS_TCON0] = RESET(0x2c4, BIT(4)), > + [RST_BUS_DE] = RESET(0x2c4, BIT(12)), > + > [RST_BUS_I2C0] = RESET(0x2d8, BIT(0)), > [RST_BUS_I2C1] = RESET(0x2d8, BIT(1)), > [RST_BUS_UART0] = RESET(0x2d8, BIT(16)),