From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 68E98C4167B for ; Mon, 19 Dec 2022 08:50:14 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4409685433; Mon, 19 Dec 2022 09:48:26 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.b="OuNG31aJ"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id BF62D85391; Mon, 19 Dec 2022 09:48:21 +0100 (CET) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 911ED8540B for ; Mon, 19 Dec 2022 09:48:18 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Sergiu.Moga@microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1671439698; x=1702975698; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+9PfU4AtH47jHTdRusSIaTJ+a7bgkX0FvQ9F1aBs6Co=; b=OuNG31aJ2kch30RAzLjTPIB1XdGdUFCq+cKfcwy9lhhz1z7y3sDH961+ VSS0XuXGlX8sp14ExOmoHFsLis9GfjGDi3MtME0LPG1BcAD6V2OZozzdD VtNMkh6KXxD+Py+kUgIo6t3CJiXbRit7eAS+LbavKDTfTkC/m5a1GkL6v ZulXbuKccyuGXqg2uhc1qMS9do+/bHg4jER/9F5e7hupFzCiaX7a1xxCA dpN/mgnBfjA6O1QCRQUJF9lHdyynkoTVwU/4EfNK9KP4Hdt17K07ILOTq MCizQ6V+3+78sU206dzqoBDeCTsOoZ25A8Q8pYrZn+xi4ChcIXNTU7ul1 A==; X-IronPort-AV: E=Sophos;i="5.96,255,1665471600"; d="scan'208";a="204571977" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 19 Dec 2022 01:48:16 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 19 Dec 2022 01:48:16 -0700 Received: from ROB-ULT-M68701.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 19 Dec 2022 01:48:10 -0700 From: Sergiu Moga To: , , , , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v4 13/19] usb: ohci-at91: Add USB PHY functionality Date: Mon, 19 Dec 2022 10:46:21 +0200 Message-ID: <20221219084626.34606-14-sergiu.moga@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221219084626.34606-1-sergiu.moga@microchip.com> References: <20221219084626.34606-1-sergiu.moga@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Add the ability to enable/disable whatever USB PHY's are passed to the AT91 OHCI driver through DT. Signed-off-by: Sergiu Moga Tested-by: Mihai Sain --- v1 -> v4: - No change drivers/usb/host/ohci-at91.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 8a10a29564..4b1aff4127 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -74,6 +74,10 @@ int usb_cpu_init_fail(void) #include #include "ohci.h" +#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB) +#include +#endif + #define AT91_MAX_USBH_PORTS 3 #define at91_for_each_port(index) \ @@ -90,6 +94,10 @@ struct ohci_at91_priv { struct clk *fclk; struct clk *hclk; bool clocked; + +#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB) + struct phy phy[AT91_MAX_USBH_PORTS]; +#endif }; static void at91_start_clock(struct ohci_at91_priv *ohci_at91) @@ -97,6 +105,13 @@ static void at91_start_clock(struct ohci_at91_priv *ohci_at91) if (ohci_at91->clocked) return; +#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB) + int i; + + at91_for_each_port(i) + generic_phy_power_on(&ohci_at91->phy[i]); +#endif + clk_set_rate(ohci_at91->fclk, 48000000); clk_prepare_enable(ohci_at91->hclk); clk_prepare_enable(ohci_at91->iclk); @@ -109,6 +124,13 @@ static void at91_stop_clock(struct ohci_at91_priv *ohci_at91) if (!ohci_at91->clocked) return; +#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB) + int i; + + at91_for_each_port(i) + generic_phy_power_off(&ohci_at91->phy[i]); +#endif + clk_disable_unprepare(ohci_at91->fclk); clk_disable_unprepare(ohci_at91->iclk); clk_disable_unprepare(ohci_at91->hclk); @@ -214,6 +236,14 @@ static int ohci_atmel_probe(struct udevice *dev) goto fail; } +#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB) + at91_for_each_port(i) { + generic_phy_get_by_index(dev, i, &ohci_at91->phy[i]); + generic_phy_init(&ohci_at91->phy[i]); + generic_phy_configure(&ohci_at91->phy[i], NULL); + } +#endif + at91_start_hc(dev); return ohci_register(dev, regs); @@ -228,6 +258,7 @@ fail: static const struct udevice_id ohci_usb_ids[] = { { .compatible = "atmel,at91rm9200-ohci", }, + { .compatible = "microchip,sama7g5-ohci", }, { } }; -- 2.34.1