From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0B90FC4332F for ; Sat, 24 Dec 2022 01:16:34 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D09C2854BF; Sat, 24 Dec 2022 02:15:54 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="pIQgnF6E"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 48920854B2; Sat, 24 Dec 2022 02:15:46 +0100 (CET) Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E07AB854C2 for ; Sat, 24 Dec 2022 02:15:42 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=bb@ti.com Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2BO1FcIv101254; Fri, 23 Dec 2022 19:15:38 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1671844539; bh=b5OQhxO398W7UQ9rTo/Tr/bvgAQB2X9g8vtNlbjuJ8k=; h=From:To:CC:Subject:Date; b=pIQgnF6EyJX87HT2Yxi5cPZrTGbtp1zaaLcxpT2ne5td7vZwQu2APMmT/P0SNj46P 3HugFP0jvV2NV1qRWBtf1kLtSQnVrZRFzWPldkXwVEyjhLfDh+dpl7AGDZTZc4QcpL GWd1YbqUkJgChxbDCuGpDef6FEFJEL8yCs8KAB/c= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2BO1FcCd023514 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 23 Dec 2022 19:15:38 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 23 Dec 2022 19:15:38 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 23 Dec 2022 19:15:38 -0600 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2BO1Fcot016189; Fri, 23 Dec 2022 19:15:38 -0600 From: Bryan Brattlof To: Tom Rini , Vignesh Raghavendra , Andrew Davis , Judith Mendez , Kamlesh Gurudasani CC: UBoot Mailing List , Bryan Brattlof Subject: [PATCH 0/5] add support for hs bootflows to am62a Date: Fri, 23 Dec 2022 19:15:20 -0600 Message-ID: <20221224011525.4696-1-bb@ti.com> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1605; i=bb@ti.com; h=from:subject; bh=hu/JWuR0FhUvpHR0gnlm0dxk9NRCAZu068RTTGZybCE=; b=owNCWmg5MUFZJlNZNyCvhgAAZH///v/Z+/dhO//n+ru3fTh//93rdtdN+39v8b65v/9+i3+wARsY x2oAYgGmgGgAAAaPUNBoAANBo0GgAGhoBo0Bo0AABoADR6TCbU8KHlHqHQaA0NNAeoNADQB6gaNGQ0 NAGhpoAAaB6gA9QyG1BoDQDTQ08poHqMgHqNBpiaBxGjQBkNA0GmRkGmTQMgDI0aGJoABpo0AMhoBi GhhNMhoAAZMgYhoyGIMgMGkgM8z+BMh8CwQaYexQJki9356DQIBcx5ZedpmOSCAaGcc4Qt0KOtAJEv 1l+hFtkLtFmfLhrM6YJI53uJxowdsPU9lhmC7BYVWEslMPfQKBvPjxIM+R7gMQFfB9Bc28IwGmWF+n 09CCRlWMR0EmnXIOP5mRWjyRgZSHNZsni9L9bghN67WX/3LHAe1olvaO12TJUsImx1HhkGFSEF3KCa mqOTQUyJMU+GeEvVJRVsIhNKW0HxgCTYZxISqCXb1+qPgh2gXOL7Q86dBWP3grM1A7YxrCykJWWM+J h94aFE5gBoUC7uEeSxKguiIT/f6wUo0cjCk5i2e4vmMEUfgIzFKvuzBUmXNH7M4G6LYSJsCMcAYMCk 0kwqy5QfGjMkCiJ0S+PAOxCFhnjFde6OlxdtM4j0xRFaUbISGigLx2kFh4x5Of4u5IpwoSBuQV8MA= X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hello everyone! Texas Instruments has started to enable security settings inside all the boot ROM and TIFS firmware in all of their SoCs. One of the few changes this brings is ROM and TIFS will now begin protecting the RAM regions they're using with firewalls. This means the wakeup domain's SPL will need to move the stack and heap to HSM RAM to ensure it stays within its allotted memory regions as well as move the needed boot information to the main domain's bootloaders that will no longer have access to HSM RAM. We will also need to edit the bootcmd to pull in the kernel and dtb's fitImage if uboot is enforcing the high security bootflow. While we're editing this bootcmd, we can also take the opportunity to convert it to a distro_bootcmd macro. Thanks for reviewing! ~Bryan Bryan Brattlof (5): configs: restrict am62ax wakup SPL size configs: am62a: move stack and heap to HSM RAM arm: mach-k3: copy bootindex to OCRAM for main domain SPL configs: am62a: convert bootcmd to distro_bootcmd configs: am62a: use kernel fitImage when using secure bootflow arch/arm/mach-k3/Kconfig | 4 ++- arch/arm/mach-k3/am62a7_init.c | 16 +++++++-- .../arm/mach-k3/include/mach/am62a_hardware.h | 17 +++++++++- configs/am62ax_evm_a53_defconfig | 1 - configs/am62ax_evm_r5_defconfig | 15 +++++--- include/configs/am62ax_evm.h | 34 +++++++++++++++++-- 6 files changed, 74 insertions(+), 13 deletions(-) base-commit: 52d91e1c20b399ddab276e2c03e5788ed5e5fdd2 -- 2.39.0