From: Rick Chen <rick@andestech.com>
To: <bmeng.cn@gmail.com>, <samuel@sholland.org>,
<ycliang@andestech.com>, <rick@andestech.com>,
<rickchen36@gmail.com>
Cc: <u-boot@lists.denx.de>
Subject: [PATCH v4] riscv: ae350: support OpenSBI 1.0+ which enable FW_PIC
Date: Wed, 4 Jan 2023 10:37:48 +0800 [thread overview]
Message-ID: <20230104023748.6109-1-rick@andestech.com> (raw)
Original OpenSBI (without FW_PIC) will relocate itself
from 0x1000000 to 0x0. After OpenSBI added FW_PIC codes,
it will not relocate any more and always run at 0x1000000.
Hence, it may overlap with Kernel memory region. So it is
necessary to change OpenSBI address from 0x1000000 to 0x0.
More details can refer to commit cb052d771200
("riscv: qemu: spl: Fix booting Linux kernel with OpenSBI 1.0+")
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
Changes in v4
- fix openSBI typo
---
board/AndesTech/ax25-ae350/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig
index 36b67f0b52..4bb33b0793 100644
--- a/board/AndesTech/ax25-ae350/Kconfig
+++ b/board/AndesTech/ax25-ae350/Kconfig
@@ -25,7 +25,7 @@ config SPL_TEXT_BASE
default 0x800000
config SPL_OPENSBI_LOAD_ADDR
- default 0x01000000
+ default 0x00000000
config SYS_FDT_BASE
hex
--
2.17.1
reply other threads:[~2023-01-04 2:38 UTC|newest]
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