[u-boot PATCH] arm: dts: k3-am64-main: Add GPMC and ELM nodes

[u-boot PATCH] arm: dts: k3-am64-main: Add GPMC and ELM nodes

[Roger Quadros]

The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
- Asynchronous SRAM-like memories and ASICs
- Asynchronous, synchronous, and page mode burst NOR flash
- NAND flash
- Pseudo-SRAM devices

The ELM module is used for GPMC NAND accesses for detecting
and correcting errors during reads due to NAND bitflips errors.

4-, 8-, and 16-bit error-correction levels are supported using
the BCH (Bose-ChaudhurI-Hocquenghem) algorithm.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
 arch/arm/dts/k3-am64-main.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
index 57b0f53ac96..43b0219f247 100644
--- a/arch/arm/dts/k3-am64-main.dtsi
+++ b/arch/arm/dts/k3-am64-main.dtsi
@@ -877,4 +877,30 @@
 		assigned-clocks = <&k3_clks 126 0>;
 		assigned-clock-parents = <&k3_clks 126 2>;
 	};
+
+	gpmc0: memory-controller@3b000000 {
+		compatible = "ti,am64-gpmc";
+		power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 80 0>;
+		clock-names = "fck";
+		reg = <0x00 0x03b000000 0x00 0x400>,
+		      <0x00 0x050000000 0x00 0x8000000>;
+		reg-names = "cfg", "data";
+		interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+		gpmc,num-cs = <3>;
+		gpmc,num-waitpins = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	elm0: ecc@25010000 {
+		compatible = "ti,am64-elm";
+		reg = <0x00 0x25010000 0x00 0x2000>;
+		interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 54 0>;
+		clock-names = "fck";
+	};
 };
-- 
2.34.1

Re: [u-boot PATCH] arm: dts: k3-am64-main: Add GPMC and ELM nodes

[Tom Rini]

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On Wed, Jan 04, 2023 at 11:53:06AM +0200, Roger Quadros wrote:

> The GPMC is a unified memory controller dedicated for interfacing
> with external memory devices like
> - Asynchronous SRAM-like memories and ASICs
> - Asynchronous, synchronous, and page mode burst NOR flash
> - NAND flash
> - Pseudo-SRAM devices
> 
> The ELM module is used for GPMC NAND accesses for detecting
> and correcting errors during reads due to NAND bitflips errors.
> 
> 4-, 8-, and 16-bit error-correction levels are supported using
> the BCH (Bose-ChaudhurI-Hocquenghem) algorithm.
> 
> Signed-off-by: Roger Quadros <rogerq@kernel.org>
> ---
>  arch/arm/dts/k3-am64-main.dtsi | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)

Can we get these changes by re-syncing the k3 dts files with the kernel?

-- 
Tom

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Re: [u-boot PATCH] arm: dts: k3-am64-main: Add GPMC and ELM nodes

[Roger Quadros]

On 09/01/2023 19:29, Tom Rini wrote:
> On Wed, Jan 04, 2023 at 11:53:06AM +0200, Roger Quadros wrote:
> 
>> The GPMC is a unified memory controller dedicated for interfacing
>> with external memory devices like
>> - Asynchronous SRAM-like memories and ASICs
>> - Asynchronous, synchronous, and page mode burst NOR flash
>> - NAND flash
>> - Pseudo-SRAM devices
>>
>> The ELM module is used for GPMC NAND accesses for detecting
>> and correcting errors during reads due to NAND bitflips errors.
>>
>> 4-, 8-, and 16-bit error-correction levels are supported using
>> the BCH (Bose-ChaudhurI-Hocquenghem) algorithm.
>>
>> Signed-off-by: Roger Quadros <rogerq@kernel.org>
>> ---
>>  arch/arm/dts/k3-am64-main.dtsi | 26 ++++++++++++++++++++++++++
>>  1 file changed, 26 insertions(+)
> 
> Can we get these changes by re-syncing the k3 dts files with the kernel?
> 

Sure, will send an update.

cheers,
-roger