From: Andre Przywara <andre.przywara@arm.com>
To: Sergei Antonov <saproj@gmail.com>
Cc: Simon Glass <sjg@chromium.org>, Tom Rini <trini@konsulko.com>,
u-boot@lists.denx.de, linux-sunxi@lists.linux.dev,
Samuel Holland <samuel@sholland.org>
Subject: Re: [PATCH] ns16550: Fix DM serial operation with non-DM SPL
Date: Tue, 17 Jan 2023 16:13:59 +0000 [thread overview]
Message-ID: <20230117161359.358ae7a3@donnerap.cambridge.arm.com> (raw)
In-Reply-To: <CABikg9w9U28WMY9rS8dQwKpz9qnNu5i2_270U=SOLmHf=ZXw=w@mail.gmail.com>
On Tue, 17 Jan 2023 16:12:54 +0300
Sergei Antonov <saproj@gmail.com> wrote:
Hi Sergei,
> On Tue, 17 Jan 2023 at 15:10, Andre Przywara <andre.przywara@arm.com> wrote:
>
> > -#if CONFIG_IS_ENABLED(DM_SERIAL) && !defined(CONFIG_SYS_NS16550_REG_SIZE)
> > +#if CONFIG_IS_ENABLED(DM_SERIAL)
> > /*
> > * For driver model we always use one byte per register, and sort out the
> > * differences in the driver
> > */
> > +#undef CONFIG_SYS_NS16550_REG_SIZE
> > #define CONFIG_SYS_NS16550_REG_SIZE (-1)
> > #endif
>
> What if I have DM_SERIAL and a 16550 UART with 32-bit registers?
So does that break for you?
Because it should still work, I think, since (as the comment says) we just
use the struct to get the register *number*. The actual register size is
worked out from the DT, and multiplied in later.
> Before 9591b63531fa the register size of 8 was enforced for DM_SERIAL.
8? Or 4?
What does your reg-shift DT property say? Is that in your DT?
Cheers,
Andre
next prev parent reply other threads:[~2023-01-17 16:14 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-17 12:09 [PATCH] ns16550: Fix DM serial operation with non-DM SPL Andre Przywara
2023-01-17 13:12 ` Sergei Antonov
2023-01-17 16:13 ` Andre Przywara [this message]
2023-01-18 13:08 ` Sergei Antonov
2023-01-17 16:16 ` Tom Rini
2023-01-17 13:15 ` Tom Rini
2023-01-17 15:55 ` Tom Rini
2023-01-17 16:09 ` Andre Przywara
2023-01-17 16:14 ` Tom Rini
2023-01-17 22:15 ` Andre Przywara
2023-01-17 22:23 ` Tom Rini
2023-01-17 23:35 ` Andre Przywara
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