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From: Yu Chien Peter Lin <peterlin@andestech.com>
To: <u-boot@lists.denx.de>
Cc: <ycliang@andestech.com>, <rick@andestech.com>,
	Yu Chien Peter Lin <peterlin@andestech.com>
Subject: [PATCH 08/11] configs: ae350: Enable v5l2 cache for AE350 platforms
Date: Thu, 19 Jan 2023 15:05:41 +0800	[thread overview]
Message-ID: <20230119070544.7423-9-peterlin@andestech.com> (raw)
In-Reply-To: <20230119070544.7423-1-peterlin@andestech.com>

Enable cache-v5l2 driver for each AE350 defconfig.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
---
 configs/ae350_rv32_defconfig         | 1 +
 configs/ae350_rv32_spl_defconfig     | 3 +++
 configs/ae350_rv32_spl_xip_defconfig | 3 +++
 configs/ae350_rv32_xip_defconfig     | 1 +
 configs/ae350_rv64_defconfig         | 1 +
 configs/ae350_rv64_spl_defconfig     | 3 +++
 configs/ae350_rv64_spl_xip_defconfig | 3 +++
 configs/ae350_rv64_xip_defconfig     | 1 +
 8 files changed, 16 insertions(+)

diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig
index e5c8358e54..5bcc7b9526 100644
--- a/configs/ae350_rv32_defconfig
+++ b/configs/ae350_rv32_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_V5L2_CACHE=y
 CONFIG_MMC=y
 CONFIG_FTSDC010=y
 CONFIG_FTSDC010_SDIO=y
diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig
index a66db65621..688c2c15cd 100644
--- a/configs/ae350_rv32_spl_defconfig
+++ b/configs/ae350_rv32_spl_defconfig
@@ -22,6 +22,8 @@ CONFIG_BOOTDELAY=3
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_MAX_SIZE=0x100000
 CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_CACHE=y
 CONFIG_SYS_PBSIZE=1050
 CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_CMD_IMLS=y
@@ -34,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_V5L2_CACHE=y
 CONFIG_MMC=y
 CONFIG_FTSDC010=y
 CONFIG_FTSDC010_SDIO=y
diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig
index 606962c0a7..07bef47e42 100644
--- a/configs/ae350_rv32_spl_xip_defconfig
+++ b/configs/ae350_rv32_spl_xip_defconfig
@@ -23,6 +23,8 @@ CONFIG_BOOTDELAY=3
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_MAX_SIZE=0x100000
 CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_CACHE=y
 CONFIG_SYS_PBSIZE=1050
 CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_CMD_IMLS=y
@@ -35,6 +37,7 @@ CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_V5L2_CACHE=y
 CONFIG_MMC=y
 CONFIG_FTSDC010=y
 CONFIG_FTSDC010_SDIO=y
diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig
index 069a9d3982..235a496c58 100644
--- a/configs/ae350_rv32_xip_defconfig
+++ b/configs/ae350_rv32_xip_defconfig
@@ -29,6 +29,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_V5L2_CACHE=y
 CONFIG_MMC=y
 CONFIG_FTSDC010=y
 CONFIG_FTSDC010_SDIO=y
diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig
index c373b99b95..af23f27ade 100644
--- a/configs/ae350_rv64_defconfig
+++ b/configs/ae350_rv64_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_V5L2_CACHE=y
 CONFIG_MMC=y
 CONFIG_FTSDC010=y
 CONFIG_FTSDC010_SDIO=y
diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig
index f235db7990..295b56835f 100644
--- a/configs/ae350_rv64_spl_defconfig
+++ b/configs/ae350_rv64_spl_defconfig
@@ -22,6 +22,8 @@ CONFIG_BOOTDELAY=3
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_MAX_SIZE=0x100000
 CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_CACHE=y
 CONFIG_SYS_PBSIZE=1050
 CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_CMD_IMLS=y
@@ -34,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_V5L2_CACHE=y
 CONFIG_MMC=y
 CONFIG_FTSDC010=y
 CONFIG_FTSDC010_SDIO=y
diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig
index 4cbfd52fb1..497e6c0155 100644
--- a/configs/ae350_rv64_spl_xip_defconfig
+++ b/configs/ae350_rv64_spl_xip_defconfig
@@ -23,6 +23,8 @@ CONFIG_BOOTDELAY=3
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_MAX_SIZE=0x100000
 CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_CACHE=y
 CONFIG_SYS_PBSIZE=1050
 CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_CMD_IMLS=y
@@ -35,6 +37,7 @@ CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_V5L2_CACHE=y
 CONFIG_MMC=y
 CONFIG_FTSDC010=y
 CONFIG_FTSDC010_SDIO=y
diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig
index 4fed2ead1d..5bc45932a8 100644
--- a/configs/ae350_rv64_xip_defconfig
+++ b/configs/ae350_rv64_xip_defconfig
@@ -29,6 +29,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_BOOTP_SEND_HOSTNAME=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_V5L2_CACHE=y
 CONFIG_MMC=y
 CONFIG_FTSDC010=y
 CONFIG_FTSDC010_SDIO=y
-- 
2.34.1


  parent reply	other threads:[~2023-01-19  7:07 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-19  7:05 [PATCH 00/11] cache operation cleanups for Andes AE350 platform Yu Chien Peter Lin
2023-01-19  7:05 ` [PATCH 01/11] riscv: global_data.h: Correct the comment for PLICSW Yu Chien Peter Lin
2023-01-31  6:39   ` Leo Liang
     [not found]   ` <PU1PR03MB2997857A35E6E20FAD5C032AC1D19@PU1PR03MB2997.apcprd03.prod.outlook.com>
2023-02-01  3:37     ` Rick Chen
2023-01-19  7:05 ` [PATCH 02/11] riscv: Remove redundant Kconfig "RISCV_NDS_CACHE" Yu Chien Peter Lin
2023-01-31  6:41   ` Leo Liang
     [not found]   ` <PU1PR03MB29972FC9DEB3F9F0889143BAC1D19@PU1PR03MB2997.apcprd03.prod.outlook.com>
2023-02-01  5:20     ` Rick Chen
2023-01-19  7:05 ` [PATCH 03/11] board: AndesTech: ax25-ae350.c: Enable v5l2-cache in spl_board_init() Yu Chien Peter Lin
2023-01-31  6:59   ` Leo Liang
     [not found]   ` <PU1PR03MB29972FEA49428A23FA2D8786C1D19@PU1PR03MB2997.apcprd03.prod.outlook.com>
2023-02-01  5:23     ` Rick Chen
2023-01-19  7:05 ` [PATCH 04/11] driver: cache: cache-v5l2: Update memory-mapped scheme to support Gen2 platform Yu Chien Peter Lin
2023-01-31  7:01   ` Leo Liang
2023-01-19  7:05 ` [PATCH 05/11] riscv: cpu: ax25: Simplify cache enabling logic in harts_early_init() Yu Chien Peter Lin
2023-01-31  7:07   ` Leo Liang
2023-01-31 15:49     ` Yu-Chien Peter Lin
2023-01-19  7:05 ` [PATCH 06/11] riscv: ae350: dts: Update L2 cache compatible string Yu Chien Peter Lin
2023-01-31  7:07   ` Leo Liang
2023-01-19  7:05 ` [PATCH 07/11] riscv: ax25: cache.c: Cleanups to L1/L2 cache function used in SPL Yu Chien Peter Lin
2023-01-31  7:09   ` Leo Liang
2023-01-19  7:05 ` Yu Chien Peter Lin [this message]
2023-01-31  7:17   ` [PATCH 08/11] configs: ae350: Enable v5l2 cache for AE350 platforms Leo Liang
     [not found]   ` <PU1PR03MB299711E617F0F0969237426EC1D19@PU1PR03MB2997.apcprd03.prod.outlook.com>
2023-02-01  5:32     ` Rick Chen
2023-01-19  7:05 ` [PATCH 09/11] configs: ae350: Increase maximum retry count " Yu Chien Peter Lin
2023-01-31  7:18   ` Leo Liang
2023-01-19  7:05 ` [PATCH 10/11] configs: ae350: Display CPU and board info " Yu Chien Peter Lin
2023-01-31  7:18   ` Leo Liang
2023-01-19  7:05 ` [PATCH 11/11] driver: cache-v5l2: Fix type casting warning on RV32 Yu Chien Peter Lin
2023-01-31  7:19   ` Leo Liang

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