From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3BF4AC27C76 for ; Mon, 23 Jan 2023 01:12:41 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4200285518; Mon, 23 Jan 2023 02:12:39 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 89B75856C1; Mon, 23 Jan 2023 02:12:37 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 16D2181F28 for ; Mon, 23 Jan 2023 02:12:35 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 42AE2AD7; Sun, 22 Jan 2023 17:13:16 -0800 (PST) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 570853F5A1; Sun, 22 Jan 2023 17:12:33 -0800 (PST) Date: Mon, 23 Jan 2023 01:10:38 +0000 From: Andre Przywara To: Samuel Holland Cc: Jernej Skrabec , Anatolij Gustschin , Jagan Teki , Lukasz Majewski , Sean Anderson , u-boot@lists.denx.de Subject: Re: [PATCH 5/5] video: sunxi: dw-hdmi: Use DM for HVCC regulator Message-ID: <20230123011038.5e866b71@slackpad.lan> In-Reply-To: <20221128070229.4394-6-samuel@sholland.org> References: <20221128070229.4394-1-samuel@sholland.org> <20221128070229.4394-6-samuel@sholland.org> Organization: Arm Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On Mon, 28 Nov 2022 01:02:28 -0600 Samuel Holland wrote: Hi, > The HDMI PHY depends on the HVCC supply being enabled. So far we have > relied on it being enabled by an earlier firmware stage (SPL or TF-A). > Attempt to enable the regulator here, so we can remove that dependency. > > Signed-off-by: Samuel Holland > --- > > drivers/video/sunxi/sunxi_dw_hdmi.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c > index 04588b570fd..963689358a6 100644 > --- a/drivers/video/sunxi/sunxi_dw_hdmi.c > +++ b/drivers/video/sunxi/sunxi_dw_hdmi.c > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > > struct sunxi_dw_hdmi_priv { > struct dw_hdmi hdmi; > @@ -331,8 +332,13 @@ static int sunxi_dw_hdmi_probe(struct udevice *dev) > (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; > struct reset_ctl_bulk resets; > struct clk_bulk clocks; > + struct udevice *hvcc; > int ret; > > + ret = device_get_supply_regulator(dev, "hvcc-supply", &hvcc); Same as in the previous patch, I think this belongs into of_to_plat(). Cheers, Andre > + if (!ret) > + regulator_set_enable(hvcc, true); > + > /* Set pll3 to 297 MHz */ > clock_set_pll3(297000000); >