From: Jagan Teki <jagan@amarulasolutions.com>
To: Kever Yang <kever.yang@rock-chips.com>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com,
Manoj Sai <abbaraju.manojsai@amarulasolutions.com>,
Ren Jianing <jianing.ren@rock-chips.com>,
Jagan Teki <jagan@amarulasolutions.com>
Subject: [PATCH v3 6/7] phy: rockchip-inno-usb2: Add USB2 PHY for rk3568
Date: Thu, 9 Feb 2023 20:00:59 +0530 [thread overview]
Message-ID: <20230209143100.113376-6-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20230209143100.113376-1-jagan@amarulasolutions.com>
From: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
RK3568 has two USB 2.0 PHYs, and each PHY has two ports, the OTG port
of PHY0 support OTG mode with charging detection function, they are
similar to previous Rockchip SoCs.
However, there are three different designs for RK3568 USB 2.0 PHY.
1. RK3568 uses independent USB GRF module for each USB 2.0 PHY.
2. RK3568 accesses the registers of USB 2.0 PHY IP directly by APB.
3. The two ports of USB 2.0 PHY share one interrupt.
This patch only PHY1 with necessary attributes required to function
USBPHY1 on U-Boot.
Co-developed-by: Ren Jianing <jianing.ren@rock-chips.com>
Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Co-developed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
---
Changes for v3:
- new patch
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 29 +++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index a01148db22..38cd0f0f33 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -298,11 +298,40 @@ static const struct rockchip_usb2phy_cfg rk3399_usb2phy_cfgs[] = {
{ /* sentinel */ }
};
+static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
+ {
+ .reg = 0xfe8b0000,
+ .port_cfgs = {
+ [USB2PHY_PORT_OTG] = {
+ .phy_sus = { 0x0000, 8, 0, 0x1d2, 0x1d1 },
+ .ls_det_en = { 0x0080, 0, 0, 0, 1 },
+ .ls_det_st = { 0x0084, 0, 0, 0, 1 },
+ .ls_det_clr = { 0x0088, 0, 0, 0, 1 },
+ .utmi_ls = { 0x00c0, 5, 4, 0, 1 },
+ .utmi_hstdet = { 0x00c0, 7, 7, 0, 1 }
+ },
+ [USB2PHY_PORT_HOST] = {
+ .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d1 },
+ .ls_det_en = { 0x0080, 1, 1, 0, 1 },
+ .ls_det_st = { 0x0084, 1, 1, 0, 1 },
+ .ls_det_clr = { 0x0088, 1, 1, 0, 1 },
+ .utmi_ls = { 0x00c0, 17, 16, 0, 1 },
+ .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 }
+ }
+ },
+ },
+ { /* sentinel */ }
+};
+
static const struct udevice_id rockchip_usb2phy_ids[] = {
{
.compatible = "rockchip,rk3399-usb2phy",
.data = (ulong)&rk3399_usb2phy_cfgs,
},
+ {
+ .compatible = "rockchip,rk3568-usb2phy",
+ .data = (ulong)&rk3568_phy_cfgs,
+ },
{ /* sentinel */ }
};
--
2.25.1
next prev parent reply other threads:[~2023-02-09 14:33 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-09 14:30 [PATCH v3 1/7] dt-bindings: rockchip: Sync rockchip, vop2.h from Linux Jagan Teki
2023-02-09 14:30 ` [PATCH v3 2/7] arm64: dts: rockchip: rk3566: Add Radxa Compute Module 3 Jagan Teki
2023-02-09 14:30 ` [PATCH v3 3/7] arm64: dts: rockchip: rk3566: Add Radxa Compute Module 3 IO Jagan Teki
2023-02-09 14:30 ` [PATCH v3 4/7] board: rockchip: Add Radxa Compute Module 3 IO Board Jagan Teki
2023-02-09 14:30 ` [PATCH v3 5/7] phy: rockchip: inno-usb2: Add support #address_cells = 2 Jagan Teki
2023-02-09 14:30 ` Jagan Teki [this message]
2023-02-09 14:31 ` [PATCH v3 7/7] config: Enable USB 2.0 for Radxa CM3-IO Jagan Teki
2023-02-16 9:25 ` [PATCH v3 1/7] dt-bindings: rockchip: Sync rockchip, vop2.h from Linux Jagan Teki
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