From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25FCCC61DA4 for ; Thu, 9 Feb 2023 21:51:35 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D041885F5D; Thu, 9 Feb 2023 22:51:30 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1675979492; bh=L+Y4LvRQhFQqYLp89cgwGz5D0bYOO+3JkT7d7Di+hR8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=pL6JeP09L2XsdG8S+eKQSKRDRwsjrt/yZB1hq5yEw83qsoK0/QWie37MN8PAkBkD6 Q1JgURmxg+PpjMo5ZmmRoBRJFq5owLE8zWEbTYIhlRrx3rd3WriiKxx+/QhFukOu7X R350DeXPX/bq6KRVvNVhDttRenmixGzsMsbbWGrEXOaagdjxAfEwQ1+bw68/ZN2Hok sTt86qfn9aByTJ8K0nFDzPr/R6nW+D19FBf5XrFXIIt+uHTiKJhvnrJUV44I9RLIV6 XgDc4WN7IeKOgmnG2T8VzJDhPmi4fs70NorgX2a9uWnUfqf9D52Cb4r3U90ySoskEm x01wBDNo+P6rA== Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 9E8DA85F60; Thu, 9 Feb 2023 22:51:25 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1675979486; bh=L+Y4LvRQhFQqYLp89cgwGz5D0bYOO+3JkT7d7Di+hR8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vJ+Ur74UcZqixT7RvIuxZZjdfENd3HAz4tywbriJq2VZcQ4PVz19nHX4+dOGvs0O5 YFJIax3cQTEVBp/+TaGCXE81b61nAr0FWK0VT2KU0H8cRLeFB9EracDTdDIVQ40nO2 AMtSScHcKZsJHhKu2mwQXikNz/qIWtj0yJfNdknlpnmjTdmFekjXtfDXSlsoctGWxC hiJKKU5kfSswxiQN1yHdYZM9m5N6edZzLXcIcokG8bbjzqrBGAzKLvDcrRMhLybhRm /9jSA27ocsm5tUqGETzco/keEVqeXcsEAdv/GisSiVxar6mKy6DdjRbIQPM98Ewt44 3941yzoq9l2Ng== From: Marek Vasut To: u-boot@lists.denx.de Cc: Marek Vasut , Ramon Fried , "Ariel D'Alessandro" , "NXP i.MX U-Boot Team" , Andrey Zhizhikin , Fabio Estevam , Joe Hershberger , Lukasz Majewski , Marcel Ziswiler , Michael Trimarchi , Peng Fan , Sean Anderson , Stefano Babic , Tim Harvey , Tommaso Merciai Subject: [PATCH v2 05/10] net: dwc_eth_qos: Set DMA_MODE SWR bit to reset the MAC Date: Thu, 9 Feb 2023 22:50:43 +0100 Message-Id: <20230209215048.259223-5-marex@denx.de> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230209215048.259223-1-marex@denx.de> References: <20230209215048.259223-1-marex@denx.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean The driver currently only waits for DMA_MODE SWR bit to clear itself. This is insufficient e.g. on i.MX8M Plus, where the MAC must be reset before IOMUX GPR[1] content is latched into the MAC and used. Without the proper reset, the i.MX8M Plus MAC variant does not take the value in IOMUX GPR[1] into account, which makes it impossible e.g. to switch interface mode from RGMII to any other. Since proper reset is desired in general to put the block into defined state, always assert the DMA_MODE SWR bit before waiting for the bit to clear itself. Reviewed-by: Ramon Fried Signed-off-by: Marek Vasut --- Cc: "Ariel D'Alessandro" Cc: "NXP i.MX U-Boot Team" Cc: Andrey Zhizhikin Cc: Fabio Estevam Cc: Joe Hershberger Cc: Lukasz Majewski Cc: Marcel Ziswiler Cc: Marek Vasut Cc: Michael Trimarchi Cc: Peng Fan Cc: Ramon Fried Cc: Sean Anderson Cc: Stefano Babic Cc: Tim Harvey Cc: Tommaso Merciai Cc: u-boot@lists.denx.de --- V2: Add RB from Ramon --- drivers/net/dwc_eth_qos.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index bdf0f2e6812..66e3f354b65 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -761,6 +761,12 @@ static int eqos_start(struct udevice *dev) eqos->reg_access_ok = true; + /* + * Assert the SWR first, the actually reset the MAC and to latch in + * e.g. i.MX8M Plus GPR[1] content, which selects interface mode. + */ + setbits_le32(&eqos->dma_regs->mode, EQOS_DMA_MODE_SWR); + ret = wait_for_bit_le32(&eqos->dma_regs->mode, EQOS_DMA_MODE_SWR, false, eqos->config->swr_wait, false); -- 2.39.1