From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F1093C6379F for ; Fri, 17 Feb 2023 12:00:33 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6315C85C1A; Fri, 17 Feb 2023 12:59:46 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="P4mvZHaf"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id BFD4385B49; Fri, 17 Feb 2023 12:59:26 +0100 (CET) Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4CAB885C23 for ; Fri, 17 Feb 2023 12:59:16 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=jagan@amarulasolutions.com Received: by mail-pj1-x1033.google.com with SMTP id s4-20020a17090a764400b002349a303ca5so985829pjl.4 for ; Fri, 17 Feb 2023 03:59:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UpJFPAIkn3DPnokZnwrl0Fhymj4X1XruEP+JGoJNLcw=; b=P4mvZHaf0AHSCvVrtEkslc60JMt8qmj9H6E1G4jzp103dLx0CNJmINorD7SGN9/GYN NJxybLXdkMmCaAX9oiduznmKOmR7Y+FtOKkHgQdcyE13R46NDkhwE/YwsyE9hCtl4j2K ujQJcwEqSwMsVzjbP1Iyb6WdlZlpQVb+/crfc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UpJFPAIkn3DPnokZnwrl0Fhymj4X1XruEP+JGoJNLcw=; b=KXYk5FQbEplcA+O7DKK3rK73Fn6Uwh10WZOvctFYUfGmE0eenWwnfz1nDo3rpcBCvX FA2wZsQGO7/qPhSvgxCzb12n4J6fAezIjPHjivBgqr8+4SQmg4WIrQOFLIjZOsy7smlK fJo7fP4A4vY0ah7sZRfhTcm/YRiJmJMRke9Ns0EMOikZv4lRo6g5QT17AOjotjaUisgm 00iAibPDSZ0xT1RHhqXgbWfg+yukJuvDAVHMkYYBaeYxWXsUaGHNvucfowqdNIGSdsAF 6c8uUgEOWwe/DeeVN7064Q6dXEcHzuT1L7x4Gs/0C9Wiw533vJctYUOXJQephshaB9t6 Fyvg== X-Gm-Message-State: AO0yUKX/8wSrRPFaH7BCqQ0iRXiC52kWBsZ8C/uLK8LIbF+zuCUnaz66 rCAiLN/dZeST50r6eac6e9gwKhny92t6ehZkbhY= X-Google-Smtp-Source: AK7set+spvhy7LrbkD8ZZ2scjL98GZtGzs86uK7sDtYxU7MypmRzEoSFyrCZEGgmj/8r9cMarXOR9w== X-Received: by 2002:a17:903:230f:b0:19a:9890:eac3 with SMTP id d15-20020a170903230f00b0019a9890eac3mr802650plh.39.1676635155144; Fri, 17 Feb 2023 03:59:15 -0800 (PST) Received: from localhost.localdomain ([183.83.141.79]) by smtp.gmail.com with ESMTPSA id ik15-20020a170902ab0f00b001991d6c6c64sm2989418plb.185.2023.02.17.03.59.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Feb 2023 03:59:14 -0800 (PST) From: Jagan Teki To: Kever Yang , Philipp Tomsich , Simon Glass Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Manoj Sai , Ren Jianing , Jagan Teki Subject: [PATCH v4 07/12] phy: rockchip-inno-usb2: Add USB2 PHY for rk3568 Date: Fri, 17 Feb 2023 17:28:40 +0530 Message-Id: <20230217115845.75303-8-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230217115845.75303-1-jagan@amarulasolutions.com> References: <20230217115845.75303-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Manoj Sai RK3568 has two USB 2.0 PHYs, and each PHY has two ports, the OTG port of PHY0 support OTG mode with charging detection function, they are similar to previous Rockchip SoCs. However, there are three different designs for RK3568 USB 2.0 PHY. 1. RK3568 uses independent USB GRF module for each USB 2.0 PHY. 2. RK3568 accesses the registers of USB 2.0 PHY IP directly by APB. 3. The two ports of USB 2.0 PHY share one interrupt. This patch only PHY1 with necessary attributes required to function USBPHY1 on U-Boot. Co-developed-by: Ren Jianing Signed-off-by: Ren Jianing Co-developed-by: Jagan Teki Signed-off-by: Jagan Teki Signed-off-by: Manoj Sai --- drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c index a01148db22..55e1dbcfef 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -298,11 +298,65 @@ static const struct rockchip_usb2phy_cfg rk3399_usb2phy_cfgs[] = { { /* sentinel */ } }; +static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = { + { + .reg = 0xfe8a0000, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0x0000, 8, 0, 0x052, 0x1d1 }, + .bvalid_det_en = { 0x0080, 2, 2, 0, 1 }, + .bvalid_det_st = { 0x0084, 2, 2, 0, 1 }, + .bvalid_det_clr = { 0x0088, 2, 2, 0, 1 }, + .ls_det_en = { 0x0080, 0, 0, 0, 1 }, + .ls_det_st = { 0x0084, 0, 0, 0, 1 }, + .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, + .utmi_avalid = { 0x00c0, 10, 10, 0, 1 }, + .utmi_bvalid = { 0x00c0, 9, 9, 0, 1 }, + .utmi_ls = { 0x00c0, 5, 4, 0, 1 }, + }, + [USB2PHY_PORT_HOST] = { + .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d1 }, + .ls_det_en = { 0x0080, 1, 1, 0, 1 }, + .ls_det_st = { 0x0084, 1, 1, 0, 1 }, + .ls_det_clr = { 0x0088, 1, 1, 0, 1 }, + .utmi_ls = { 0x00c0, 17, 16, 0, 1 }, + .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 } + } + }, + }, + { + .reg = 0xfe8b0000, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0x0000, 8, 0, 0x1d2, 0x1d1 }, + .ls_det_en = { 0x0080, 0, 0, 0, 1 }, + .ls_det_st = { 0x0084, 0, 0, 0, 1 }, + .ls_det_clr = { 0x0088, 0, 0, 0, 1 }, + .utmi_ls = { 0x00c0, 5, 4, 0, 1 }, + .utmi_hstdet = { 0x00c0, 7, 7, 0, 1 } + }, + [USB2PHY_PORT_HOST] = { + .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d1 }, + .ls_det_en = { 0x0080, 1, 1, 0, 1 }, + .ls_det_st = { 0x0084, 1, 1, 0, 1 }, + .ls_det_clr = { 0x0088, 1, 1, 0, 1 }, + .utmi_ls = { 0x00c0, 17, 16, 0, 1 }, + .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 } + } + }, + }, + { /* sentinel */ } +}; + static const struct udevice_id rockchip_usb2phy_ids[] = { { .compatible = "rockchip,rk3399-usb2phy", .data = (ulong)&rk3399_usb2phy_cfgs, }, + { + .compatible = "rockchip,rk3568-usb2phy", + .data = (ulong)&rk3568_phy_cfgs, + }, { /* sentinel */ } }; -- 2.25.1