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([103.97.165.210]) by smtp.googlemail.com with ESMTPSA id j64-20020aca3c43000000b003458d346a60sm2929480oia.25.2023.02.18.04.25.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Feb 2023 04:25:34 -0800 (PST) From: Mayuresh Chitale To: u-boot@lists.denx.de Cc: Mayuresh Chitale Subject: [PATCH] pci: ecm generic: use dev_read_() interface Date: Sat, 18 Feb 2023 17:55:25 +0530 Message-Id: <20230218122525.3815554-1-mchitale@ventanamicro.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Use dev_read_() api instead of the fdtdec API to fetch the host controller's reg property value. This is similar to the other host controller drivers such as Sifive, Rockchip etc. Without this change, enabling CONFIG_OF_LIVE breaks the PCIe enumeration on Qemu Risc-V virt machine. The issue is described in the link below: Link: https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/1 Signed-off-by: Mayuresh Chitale --- drivers/pci/pcie_ecam_generic.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/drivers/pci/pcie_ecam_generic.c b/drivers/pci/pcie_ecam_generic.c index 1a9f9aec2e..f0effe0001 100644 --- a/drivers/pci/pcie_ecam_generic.c +++ b/drivers/pci/pcie_ecam_generic.c @@ -132,19 +132,14 @@ static int pci_generic_ecam_write_config(struct udevice *bus, pci_dev_t bdf, static int pci_generic_ecam_of_to_plat(struct udevice *dev) { struct generic_ecam_pcie *pcie = dev_get_priv(dev); - struct fdt_resource reg_res; - DECLARE_GLOBAL_DATA_PTR; - int err; - - err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg", - 0, ®_res); - if (err < 0) { - pr_err("\"reg\" resource not found\n"); - return err; - } - - pcie->size = fdt_resource_size(®_res); - pcie->cfg_base = map_physmem(reg_res.start, pcie->size, MAP_NOCACHE); + fdt_addr_t addr; + fdt_size_t size; + + addr = dev_read_addr_size(dev, "reg", &size); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + pcie->size = size; + pcie->cfg_base = map_physmem(addr, pcie->size, MAP_NOCACHE); return 0; } -- 2.34.1