From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1DFEAC636D7 for ; Tue, 21 Feb 2023 20:34:28 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 46F7885AE6; Tue, 21 Feb 2023 21:25:20 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="XstpJKGj"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 97F4385AFC; Tue, 21 Feb 2023 21:24:01 +0100 (CET) Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4FE8085AAC for ; Tue, 21 Feb 2023 21:22:33 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id F1099B81098; Tue, 21 Feb 2023 20:22:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 630A7C433AC; Tue, 21 Feb 2023 20:22:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1677010951; bh=LBYvVR5kO39sbPIG0sxUaJZr8qaPTLWuFPtiXl3g7FA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XstpJKGjEaWe+xzqmCJykbyiwQudtS6ESIJk0k25CHs8juOsq/K3AlvEwonpVMHNo 8y2yhIOm1i1rv6v4HcpG6lImC8KLKS6TeqM2xOu5Gu9XpkrQ44Ti53GGq7uRW+ztzc s0rrFDRsONXZJ1TJPtdUTxxtVwrdUAVDVvsF6CWiVmUAtSioiDbbOXR4MOEYUlxNTG A7EFEaYkAJGAMr6v9O0Qjvk/ducfiVNhtQPRvJwTMcD18ukEjq3wGcxs9yO+QWB36L /yKhj3ecL3m5wP71j7p1CtK93Fej5uzaIHy4aqH6NNePZepHk5iIZbJNuB2JWND9rg lKKeVEofO3e8w== Received: by pali.im (Postfix) id 0AE332B55; Tue, 21 Feb 2023 21:22:30 +0100 (CET) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: u-boot@lists.denx.de Cc: Stefan Roese , Tony Dinh , Josua Mayer Subject: [PATCH RFC u-boot-mvebu 17/59] tools: kwboot: Add check that kwbimage contains DDR init code Date: Tue, 21 Feb 2023 21:18:43 +0100 Message-Id: <20230221201925.9644-18-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230221201925.9644-1-pali@kernel.org> References: <20230221201925.9644-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Some NOR images may be execute-in-place and do not contain DDR init code in its kwbimage header. Such images cannot be booted over UART as BootROM loads them to RAM. Add check that kwbimage contains DDR init code in its header (either as binary code header or as the simple register-value set). In some cases it is possible to load very small image into L2SRAM and when DDR init code is not required. So check for L2SRAM load address and skip DDR init code check in this case. Signed-off-by: Pali Rohár --- tools/kwboot.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/tools/kwboot.c b/tools/kwboot.c index c8c7a8d24658..f624edc7798f 100644 --- a/tools/kwboot.c +++ b/tools/kwboot.c @@ -1780,6 +1780,47 @@ kwboot_img_is_secure(void *img) return 0; } +static int +kwboot_img_has_ddr_init(void *img) +{ + const struct register_set_hdr_v1 *rhdr; + const struct main_hdr_v0 *hdr0; + struct opt_hdr_v1 *ohdr; + u32 ohdrsz; + int last; + + /* + * kwbimage v0 image headers contain DDR init code either in + * extension header or in binary code header. + */ + if (kwbimage_version(img) == 0) { + hdr0 = img; + return hdr0->ext || hdr0->bin; + } + + /* + * kwbimage v1 image headers contain DDR init code either in binary + * code header or in a register set list header with SDRAM_SETUP. + */ + for_each_opt_hdr_v1 (ohdr, img) { + if (ohdr->headertype == OPT_HDR_V1_BINARY_TYPE) + return 1; + if (ohdr->headertype == OPT_HDR_V1_REGISTER_TYPE) { + rhdr = (const struct register_set_hdr_v1 *)ohdr; + ohdrsz = opt_hdr_v1_size(ohdr); + if (ohdrsz >= sizeof(*ohdr) + sizeof(rhdr->data[0].last_entry)) { + ohdrsz -= sizeof(*ohdr) + sizeof(rhdr->data[0].last_entry); + last = ohdrsz / sizeof(rhdr->data[0].entry); + if (rhdr->data[last].last_entry.delay == + REGISTER_SET_HDR_OPT_DELAY_SDRAM_SETUP) + return 1; + } + } + } + + return 0; +} + static void * kwboot_img_grow_data_right(void *img, size_t *size, size_t grow) { @@ -2011,6 +2052,13 @@ kwboot_img_patch(void *img, size_t *size, int baudrate) kwboot_img_grow_data_right(img, size, sizeof(uint32_t)); } + if (!kwboot_img_has_ddr_init(img) && + (le32_to_cpu(hdr->destaddr) < 0x40000000 || + le32_to_cpu(hdr->destaddr) + le32_to_cpu(hdr->blocksize) > 0x40034000)) { + fprintf(stderr, "Image does not contain DDR init code needed for UART booting\n"); + goto err; + } + is_secure = kwboot_img_is_secure(img); if (hdr->blockid != IBR_HDR_UART_ID) { -- 2.20.1