[PATCH RFC u-boot-mvebu 58/59] arm: mvebu: Define SPL memory maps

Pali Rohár
2023-02-21T20:34:04Z

In SPL are active memory maps set by the BootROM. Define them in cpu.h file
to the correct values. Some peripherals are not mapped at all.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
arch/arm/mach-mvebu/include/mach/cpu.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)

diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index 906a8737a401..904e7157ba61 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -66,11 +66,21 @@ enum cpu_attrib {
/*
* Default Device Address MAP BAR values
*/
+#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_ARMADA_38X
+#define MBUS_PCI_MEM_BASE 0x88000000
+#define MBUS_PCI_MEM_SIZE ((3 * 128) << 20)
+#else
+#define MBUS_PCI_MEM_BASE 0x80000000
+#define MBUS_PCI_MEM_SIZE ((4 * 128) << 20)
+#endif
+#else
#define MBUS_PCI_MAX_PORTS 6
#define MBUS_PCI_MEM_BASE MVEBU_SDRAM_SIZE_MAX
#define MBUS_PCI_MEM_SIZE ((MBUS_PCI_MAX_PORTS * 128) << 20)
#define MBUS_PCI_IO_BASE 0xF1100000
#define MBUS_PCI_IO_SIZE ((MBUS_PCI_MAX_PORTS * 64) << 10)
+#endif
#ifdef CONFIG_SPL_BUILD
#define MBUS_SPI_BASE 0xD4000000
#define MBUS_SPI_SIZE (64 << 20)
@@ -78,10 +88,16 @@ enum cpu_attrib {
#define MBUS_SPI_BASE 0xF4000000
#define MBUS_SPI_SIZE (8 << 20)
#endif
+#ifndef CONFIG_SPL_BUILD
#define MBUS_DFX_BASE 0xF6000000
#define MBUS_DFX_SIZE (1 << 20)
+#endif
#define MBUS_BOOTROM_BASE 0xF8000000
+#ifdef CONFIG_SPL_BUILD
+#define MBUS_BOOTROM_SIZE (128 << 20)
+#else
#define MBUS_BOOTROM_SIZE (8 << 20)
+#endif

struct mbus_win {
u32 base;
--
2.20.1