From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2403EC678DB for ; Sat, 4 Mar 2023 10:52:24 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id AC10885C64; Sat, 4 Mar 2023 11:51:51 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="c65Ds4oB"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id F1D7285A66; Sat, 4 Mar 2023 11:51:43 +0100 (CET) Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 2529385A4A for ; Sat, 4 Mar 2023 11:51:39 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id B7DF4B816A0; Sat, 4 Mar 2023 10:51:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 29230C4339B; Sat, 4 Mar 2023 10:51:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1677927097; bh=O6kHJClmn8huTwyi4fVX0RB4B1/ZaaRhbGvbic1OHbA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c65Ds4oBZvdtYtR64ubepGgp+LIAkVePd9IJ3a7k70GGsraz81Cvtysy4vi0d7Gow 6zXt40bFnSZYCWdl7t94FIeFwdHM1WA+hNBPAx9dtqkCh5lmj+EtbteKTjGdjYzSHW lHEuyItEYdKNiLne5jJgxEwyppvYm2ixgDnxjL0/ARfp3mP67TNar0ytnPcd38t+Bw JFoq8dBhQ0Hc1MGAMNx9FslHODivzfxOLiENXRbu6tKHtXMUKZaaKUnm132SVof/h7 CMcgZGgc8DJUqDfLBjmZqnT3tD1XAlNnfYKVIL0H9VUg1WJcj51c4By2sBTuuqVJQe 0txgPWnESYHJQ== Received: by pali.im (Postfix) id E337CECE; Sat, 4 Mar 2023 11:51:34 +0100 (CET) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Martin Rowe , Tony Dinh , Stefan Roese , Chris Packham , Baruch Siach Cc: u-boot@lists.denx.de Subject: [PATCH RFC u-boot-mvebu 3/6] arm: mvebu: Convert BOOT_FROM_* constants to function macros Date: Sat, 4 Mar 2023 11:50:33 +0100 Message-Id: <20230304105036.19189-4-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230304105036.19189-1-pali@kernel.org> References: <20230304105036.19189-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean This allows to merge BOOT_FROM_MMC and BOOT_FROM_MMC_ALT constants to one macro. And also allows to extend other BOOT_FROM_* macros for other variants. Signed-off-by: Pali Rohár --- arch/arm/mach-mvebu/cpu.c | 16 +++++++++------- arch/arm/mach-mvebu/include/mach/soc.h | 25 ++++++++++++------------- 2 files changed, 21 insertions(+), 20 deletions(-) diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index daa84c03fcdc..cb3f3afad269 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -98,24 +98,26 @@ u32 get_boot_device(void) val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */ boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS; debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device); - switch (boot_device) { #ifdef BOOT_FROM_NAND - case BOOT_FROM_NAND: + if (BOOT_FROM_NAND(boot_device)) return BOOT_DEVICE_NAND; #endif #ifdef BOOT_FROM_MMC - case BOOT_FROM_MMC: - case BOOT_FROM_MMC_ALT: + if (BOOT_FROM_MMC(boot_device)) return BOOT_DEVICE_MMC1; #endif - case BOOT_FROM_UART: +#ifdef BOOT_FROM_UART + if (BOOT_FROM_UART(boot_device)) return BOOT_DEVICE_UART; +#endif #ifdef BOOT_FROM_SATA - case BOOT_FROM_SATA: + if (BOOT_FROM_SATA(boot_device)) return BOOT_DEVICE_SATA; #endif - case BOOT_FROM_SPI: +#ifdef BOOT_FROM_SPI + if (BOOT_FROM_SPI(boot_device)) return BOOT_DEVICE_SPI; +#endif default: return BOOT_DEVICE_BOOTROM; }; diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 5fdce8fe4e7e..aa42db36a1ee 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -143,8 +143,8 @@ #define BOOT_DEV_SEL_OFFS 3 #define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS) -#define BOOT_FROM_UART 0x30 -#define BOOT_FROM_SPI 0x38 +#define BOOT_FROM_UART(x) (x == 0x30) +#define BOOT_FROM_SPI(x) (x == 0x38) #define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(20)) ? \ 200000000 : 166000000) @@ -160,12 +160,11 @@ #define BOOT_DEV_SEL_OFFS 4 #define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS) -#define BOOT_FROM_NAND 0x0A -#define BOOT_FROM_SATA 0x2A -#define BOOT_FROM_UART 0x28 -#define BOOT_FROM_SPI 0x32 -#define BOOT_FROM_MMC 0x30 -#define BOOT_FROM_MMC_ALT 0x31 +#define BOOT_FROM_NAND(x) (x == 0x0A) +#define BOOT_FROM_SATA(x) (x == 0x2A) +#define BOOT_FROM_UART(x) (x == 0x28) +#define BOOT_FROM_SPI(x) (x == 0x32) +#define BOOT_FROM_MMC(x) (x == 0x30 || x == 0x31) #define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(15)) ? \ 200000000 : 250000000) @@ -182,9 +181,9 @@ #define BOOT_DEV_SEL_OFFS 11 #define BOOT_DEV_SEL_MASK (0x7 << BOOT_DEV_SEL_OFFS) -#define BOOT_FROM_NAND 0x1 -#define BOOT_FROM_UART 0x2 -#define BOOT_FROM_SPI 0x3 +#define BOOT_FROM_NAND(x) (x == 0x1) +#define BOOT_FROM_UART(x) (x == 0x2) +#define BOOT_FROM_SPI(x) (x == 0x3) #define CONFIG_SYS_TCLK 200000000 /* 200MHz */ #elif defined(CONFIG_ARMADA_XP) @@ -204,8 +203,8 @@ #define BOOT_DEV_SEL_OFFS 5 #define BOOT_DEV_SEL_MASK (0xf << BOOT_DEV_SEL_OFFS) -#define BOOT_FROM_UART 0x2 -#define BOOT_FROM_SPI 0x3 +#define BOOT_FROM_UART(x) (x == 0x2) +#define BOOT_FROM_SPI(x) (x == 0x3) #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ #endif -- 2.20.1