From: Jonathan Liu <net147@gmail.com>
To: u-boot@lists.denx.de
Cc: Kever Yang <kever.yang@rock-chips.com>,
YouMin Chen <cym@rock-chips.com>,
Jagan Teki <jagan@amarulasolutions.com>,
Jonathan Liu <net147@gmail.com>
Subject: [PATCH] ram: rk3399: add missing high row detection
Date: Thu, 23 Mar 2023 21:35:58 +1100 [thread overview]
Message-ID: <20230323103558.185456-1-net147@gmail.com> (raw)
For 2 GB LPDDR4 single-rank RAM with 16 rows, the Rockchip ddr init bin
prints:
"Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB"
U-Boot TPL prints:
"BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB"
Add missing high row detection so that U-Boot TPL prints Row=16, same as
the Rockchip ddr init bin:
"BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB"
Signed-off-by: Jonathan Liu <net147@gmail.com>
---
drivers/ram/rockchip/sdram_rk3399.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index b1fea04e84..b597448203 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -2749,6 +2749,8 @@ static u64 dram_detect_cap(struct dram_info *dram,
/* detect cs1 row */
sdram_detect_cs1_row(cap_info, params->base.dramtype);
+ sdram_detect_high_row(cap_info);
+
/* detect die bw */
sdram_detect_dbw(cap_info, params->base.dramtype);
--
2.40.0
next reply other threads:[~2023-03-23 12:20 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-23 10:35 Jonathan Liu [this message]
2023-04-14 9:31 ` [PATCH] ram: rk3399: add missing high row detection Kever Yang
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