[PATCH v4 06/14] net: dwc_eth_qos: Set DMA_MODE SWR bit to reset the MAC

sbabic
2023-03-30T15:25:21Z

> The driver currently only waits for DMA_MODE SWR bit to clear itself.
> This is insufficient e.g. on i.MX8M Plus, where the MAC must be reset
> before IOMUX GPR[1] content is latched into the MAC and used. Without
> the proper reset, the i.MX8M Plus MAC variant does not take the value
> in IOMUX GPR[1] into account, which makes it impossible e.g. to switch
> interface mode from RGMII to any other.
> Since proper reset is desired in general to put the block into defined
> state, always assert the DMA_MODE SWR bit before waiting for the bit
> to clear itself.
> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>