From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9D460C761A6 for ; Thu, 30 Mar 2023 17:40:26 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 97DB085F1D; Thu, 30 Mar 2023 19:40:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="nmo8UC/B"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1B47585F18; Thu, 30 Mar 2023 19:40:16 +0200 (CEST) Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0440C857BD for ; Thu, 30 Mar 2023 19:40:10 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=vaishnav.a@ti.com Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32UHe7nk115690; Thu, 30 Mar 2023 12:40:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1680198007; bh=9uEOzN4wwxVGgQXaadA3EmxTfjSUevDLkTB+y75L0Og=; h=From:To:CC:Subject:Date; b=nmo8UC/BsofN/IdL6w4Jc1zVAAISq5fz7x8sVLfE6chqNKF1sEJFKzucciCwmv359 lBcSMhjNlpPyJAgr5wRfGdHe9G12Gta3OYx8PGnXuGD6JGDBe2cjt4Sx0ZzT0GeqEq pVLph/TLFnsTCDdeva8eiX8keZvzqO9sXsiLJagE= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32UHe7mp016810 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 30 Mar 2023 12:40:07 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Thu, 30 Mar 2023 12:40:06 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Thu, 30 Mar 2023 12:40:06 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32UHe5b4111603; Thu, 30 Mar 2023 12:40:06 -0500 From: Vaishnav Achath To: , CC: , , , , Subject: [PATCH 0/2] arm: dts: J721E Hyperbus Fixes Date: Thu, 30 Mar 2023 23:10:03 +0530 Message-ID: <20230330174005.24950-1-vaishnav.a@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean J721E SoC has a hyperbus controller and OSPI controller muxed and only one of the controllers should be active at a time While enabling support for hyperflash in J721E, the hyperbus controller was enabled by default in SoC DTS and was kept disabled in board DTS. For J721E SK, the board level DTS does not disable the hyperbus node which causes OSPI and Hyperbus controllers to be active at the same time thus causing boot failure on J721E SK, to avoid situations like this keep the hyperbus controller disabled by default in SoC DTS. Also the fixups for hyperflash enable according to DIP switch settings on EVM is relevant only to J721E EVM and J7200 EVM, thus disable those fixups for other platforms. Since the hyperbus node is not present in kernel DTS, manual update is needed to fix the issue( J721E SK Boot failure). J721E SK boot failure needs additional fixes on the board DTS which will be sent separately, but hyperbus and OSPI controller being active was also one of the issues causing boot failure. Changes were tested on J721E EVM and J721E SK for basic boot and hyperflash functionality(EVM). Vaishnav Achath (2): arm: dts: k3-j721e-mcu-wakeup: Disable hyperbus controller node board: ti: j721e: Disable hyperflash fixup for J721E SK arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 1 + board/ti/j721e/evm.c | 6 ++++++ 2 files changed, 7 insertions(+) -- 2.17.1