From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5CD3C6FD1D for ; Thu, 30 Mar 2023 20:29:32 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0CB7485ED8; Thu, 30 Mar 2023 22:29:26 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="lI0P0WAk"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id B619D85E02; Thu, 30 Mar 2023 22:29:08 +0200 (CEST) Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 30C0B80A37 for ; Thu, 30 Mar 2023 22:29:01 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=afd@ti.com Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32UKSwtl104276; Thu, 30 Mar 2023 15:28:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1680208138; bh=/MXWpM/Ru9CTZaIZlW9F9TZaAK9kEeAnZ0ypW/JEeT0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=lI0P0WAkj3pxV06Fp7xBwsF+KhQKf6u+tJT0/DkPnBv9cJkDC97ZgWgr1cCnl2wOx l6ReBh958SiY/cn8AW0TWsb4xv1m8wIRheYo6K6eRm4615sFFacV38bhk3doeWo5N0 JZKtxmmIU63BB8m6HnYz9Ga7uiqxO5cvA66XnLjA= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32UKSwQu112557 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 30 Mar 2023 15:28:58 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Thu, 30 Mar 2023 15:28:58 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Thu, 30 Mar 2023 15:28:58 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32UKSvBt034265; Thu, 30 Mar 2023 15:28:58 -0500 From: Andrew Davis To: Simon Glass , Tom Rini , CC: Andrew Davis Subject: [PATCH 02/12] arm: mach-k3: Move J721e SoC detection out of common section Date: Thu, 30 Mar 2023 15:28:47 -0500 Message-ID: <20230330202857.8216-2-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230330202857.8216-1-afd@ti.com> References: <20230330202857.8216-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This belongs in the J721e specific file as it is the only place this is used. Any board level users should use the SOC driver. While here, move the J721e and J7200 SoC IDs out of sys_proto.h and into hardware.h. Add the rest of the SoC IDs for completeness and later use. Signed-off-by: Andrew Davis --- arch/arm/mach-k3/common.c | 20 -------------------- arch/arm/mach-k3/common.h | 3 --- arch/arm/mach-k3/include/mach/hardware.h | 8 ++++++++ arch/arm/mach-k3/include/mach/sys_proto.h | 3 --- arch/arm/mach-k3/j721e_init.c | 20 ++++++++++++++++++++ 5 files changed, 28 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index 6870f13c520..6e084de692c 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -488,26 +488,6 @@ int print_cpuinfo(void) } #endif -bool soc_is_j721e(void) -{ - u32 soc; - - soc = (readl(CTRLMMR_WKUP_JTAG_ID) & - JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT; - - return soc == J721E; -} - -bool soc_is_j7200(void) -{ - u32 soc; - - soc = (readl(CTRLMMR_WKUP_JTAG_ID) & - JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT; - - return soc == J7200; -} - #ifdef CONFIG_ARM64 void board_prep_linux(struct bootm_headers *images) { diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index 8f38fcef7f0..531be0be54c 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -9,9 +9,6 @@ #include #include -#define J721E 0xbb64 -#define J7200 0xbb6d - struct fwl_data { const char *name; u16 fwl_id; diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h index 2c60ef85432..f87b4c6e5a7 100644 --- a/arch/arm/mach-k3/include/mach/hardware.h +++ b/arch/arm/mach-k3/include/mach/hardware.h @@ -36,6 +36,14 @@ #define JTAG_ID_VARIANT_MASK (0xf << 28) #define JTAG_ID_PARTNO_SHIFT 12 #define JTAG_ID_PARTNO_MASK (0xffff << 12) +#define JTAG_ID_PARTNO_AM65X 0xbb5a +#define JTAG_ID_PARTNO_J721E 0xbb64 +#define JTAG_ID_PARTNO_J7200 0xbb6d +#define JTAG_ID_PARTNO_AM64X 0xbb38 +#define JTAG_ID_PARTNO_J721S2 0xbb75 +#define JTAG_ID_PARTNO_AM62X 0xbb7e +#define JTAG_ID_PARTNO_AM62AX 0xbb8d + #define K3_SEC_MGR_SYS_STATUS 0x44234100 #define SYS_STATUS_DEV_TYPE_SHIFT 0 #define SYS_STATUS_DEV_TYPE_MASK (0xf) diff --git a/arch/arm/mach-k3/include/mach/sys_proto.h b/arch/arm/mach-k3/include/mach/sys_proto.h index 0b5d606eaa2..d5d4b787b7d 100644 --- a/arch/arm/mach-k3/include/mach/sys_proto.h +++ b/arch/arm/mach-k3/include/mach/sys_proto.h @@ -15,9 +15,6 @@ int do_board_detect(void); void release_resources_for_core_shutdown(void); int fdt_disable_node(void *blob, char *node_path); -bool soc_is_j721e(void); -bool soc_is_j7200(void); - void k3_spl_init(void); void k3_mem_init(void); bool check_rom_loaded_sysfw(void); diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index 276cbb5dae2..233b867e90c 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -63,6 +63,26 @@ struct fwl_data cbass_hc_cfg0_fwls[] = { }; #endif +bool soc_is_j721e(void) +{ + u32 soc; + + soc = (readl(CTRLMMR_WKUP_JTAG_ID) & + JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT; + + return soc == JTAG_ID_PARTNO_J721E; +} + +bool soc_is_j7200(void) +{ + u32 soc; + + soc = (readl(CTRLMMR_WKUP_JTAG_ID) & + JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT; + + return soc == JTAG_ID_PARTNO_J7200; +} + static void ctrl_mmr_unlock(void) { /* Unlock all WKUP_CTRL_MMR0 module registers */ -- 2.39.2