From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F3BCDC77B76 for ; Mon, 17 Apr 2023 18:57:10 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 42EA885F7B; Mon, 17 Apr 2023 20:57:08 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="OIW/gSm5"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id BD5F585F7B; Mon, 17 Apr 2023 20:57:06 +0200 (CEST) Received: from mail-qt1-x831.google.com (mail-qt1-x831.google.com [IPv6:2607:f8b0:4864:20::831]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 69CF485021 for ; Mon, 17 Apr 2023 20:57:03 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ralph.siemsen@linaro.org Received: by mail-qt1-x831.google.com with SMTP id ff18so3798627qtb.13 for ; Mon, 17 Apr 2023 11:57:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1681757822; x=1684349822; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=ttajUR9LzCo0bn6EJeAl6E6ZHPWcHVdT1NboqaLW9e8=; b=OIW/gSm57RCr1SkN6IXtz+7a/4x0v8tGmHNQ+64ukLPh2z1Aky6Gd9DI8Jy9ZFuMyu 5OCwj/Eh6YrXPnHZi6323CCYpCytJRZ09Yy66E5nSyzBkXW5rASwntruUmvKzxbzozZm nXkQE+0LkgbciUlf/Y/jxPXajdPpFpHOrHbAmtEm3BNs3hzb1364wt9xI3htg1ZN4n66 +GDUdhs8MDOe6/ZEWl/hHp5z+sFVBT10qxZI6gsnaOKNDtk3cj5zEuSU6L+7KkfybV+g JTSDltKfIv03YNEjlGRAB+1xRG2+qWjeN7KodjePZ0iSSVpcp5OSzTNhwDtBS/EMeorf MZNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681757822; x=1684349822; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=ttajUR9LzCo0bn6EJeAl6E6ZHPWcHVdT1NboqaLW9e8=; b=OZ4L6ho1C7ORpklCINHf+4sHypBHY+NzlL+dTossPbPXd5rJKnj39+wPfxgoWKs0aR k4UibXrwjGy5dHfxzr/JRnwXgoE8S2NQghWSwQNQhEO+cxcJbqTwv0pboakAYFzFjKU1 xloOGgwN6AWIy4Fqq8l7c+Ps+ohM8SoQi5o4RUhOLLMNWdFsEV4y/1W8SfsgazJgHEa8 yJdN8RBEzdXWI4jNfRt6WkFEOZJBLyAq9sqp0cvzJDOc4QPbuV4TOOQxYL9m5KDB2NGE zii1Eh5fbk0vWkKdxU83nurx81ZqdtHh3VTp5yp311ga3Q5JkLlvo2J8h4hZMEIrOdBo p29g== X-Gm-Message-State: AAQBX9eZ9RGggPMRQQpVPydwF0ceJHc25EaoiOKsqF587S/s/8cDv33N CQ3OJlHJ0T2vbdMsy0L1r2bYlQ== X-Google-Smtp-Source: AKy350b5iYjfLpk4bdzBmq45eZ/CdfipSe/lyp87rylAbx507+ic8c2DGvFgixbPIdGkoTuRpjrVvA== X-Received: by 2002:a05:622a:19a5:b0:3ef:37e3:cc64 with SMTP id u37-20020a05622a19a500b003ef37e3cc64mr913260qtc.3.1681757822080; Mon, 17 Apr 2023 11:57:02 -0700 (PDT) Received: from localhost (rfs.netwinder.org. [206.248.184.2]) by smtp.gmail.com with ESMTPSA id v8-20020a05622a014800b003ef0ed50057sm1292487qtw.27.2023.04.17.11.57.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Apr 2023 11:57:01 -0700 (PDT) Date: Mon, 17 Apr 2023 14:57:01 -0400 From: Ralph Siemsen To: Marek Vasut Cc: u-boot@lists.denx.de, Bharat Gooty , Rayagonda Kokatanur Subject: Re: [PATCH v4 07/10] ARM: rzn1: basic support for Renesas RZ/N1 SoC Message-ID: <20230417185701.GE642444@maple.netwinder.org> References: <20230308202653.1926303-1-ralph.siemsen@linaro.org> <20230308202653.1926303-8-ralph.siemsen@linaro.org> <9c36e8c1-094a-f96e-a28e-b37e662e7d3f@mailbox.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: <9c36e8c1-094a-f96e-a28e-b37e662e7d3f@mailbox.org> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Mon, Apr 17, 2023 at 07:15:07PM +0200, Marek Vasut wrote: >On 3/8/23 21:26, Ralph Siemsen wrote: > >[...] > >>+++ b/arch/arm/Kconfig >>@@ -1031,6 +1031,21 @@ config ARCH_RMOBILE >> imply SYS_THUMB_BUILD >> imply ARCH_MISC_INIT if DISPLAY_CPUINFO >>+config ARCH_RZN1 >>+ bool "Reneasa RZ/N1 SoC" >>+ select CLK >>+ select CLK_RENESAS >>+ select CLK_R9A06G032 > >Does 'select CLK_R9A06G032' automatically activate the dependencies >like 'CLK_RENESAS' too ? Do you mean things like CLK_RCAR_CPG_LIB for example? The new clock driver has no dependencies (except perhaps ARCH_RZN1). Since this clock driver is essential to boot, I figured it was best to select it in Kconfig, rather than require each board defconfig to specify the same options. If there is a better/preferred approach, I will implement it. > >>+ select DM >>+ select DM_ETH >>+ select DM_SERIAL >>+ select PINCTRL >>+ select PINCONF >>+ select REGMAP >>+ select SYSRESET >>+ select SYSRESET_SYSCON >>+ imply CMD_DM >>+ >> config ARCH_SNAPDRAGON >> bool "Qualcomm Snapdragon SoCs" >> select ARM64 >>@@ -2207,6 +2222,8 @@ source "arch/arm/mach-owl/Kconfig" >> source "arch/arm/mach-rmobile/Kconfig" >>+source "arch/arm/mach-rzn1/Kconfig" > >Should this be in mach-rmobile (which, maybe, should be renamed to >mach-renesas) ? I vaguely recall that I discussed this with someone (possibly you), likely on IRC. And I think the conclusion was there was a significant enough difference (possibly Cortex-A7 versus A9?). I don't have a strong preference, if moving to mach-rmobile makes sense, let me know and I can give it a go. >>+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) >>+void enable_caches(void) >>+{ > >Why not enable icache with icache_enable() too ? The I-cache is enabled quite early in arch/arm/cpu/armv7/start.S Ralph