[PATCH v4 1/2] ARM: dts: rk3588-rock-5b-u-boot: add bootph-all to pinctrl for sdmmc

[PATCH v4 1/2] ARM: dts: rk3588-rock-5b-u-boot: add bootph-all to pinctrl for sdmmc

[Eugen Hristev]

To be able to initialize the pinctrl correctly at SPL level and read
u-boot proper from SD-Card, the pinctrl must be initialized.

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
---
Changes in v4:
- rebased on latest master: This is also on top of the USB 2.0 series !
Changes in v3:
- change to bootph-all props.

Changes in v2:
- add u-boot,dm-spl to pull up nodes, to also setup the pull control
correctly. Also, in the loop that initializes multiple pins, only the
first will be muxed as the loop will break when the pull up node is not
found.

 arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 26 +++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index 53d029c60e8f..e9fcb7b92eb3 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -31,6 +31,8 @@
 };
 
 &pinctrl {
+	bootph-all;
+
 	usb {
 		vcc5v0_host_en: vcc5v0-host-en {
 			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -38,11 +40,35 @@
 	};
 };
 
+&pcfg_pull_up_drv_level_2 {
+	bootph-all;
+};
+
+&pcfg_pull_up {
+	bootph-all;
+};
+
 &sdmmc {
 	bus-width = <4>;
 	status = "okay";
 };
 
+&sdmmc_bus4 {
+	bootph-all;
+};
+
+&sdmmc_clk {
+	bootph-all;
+};
+
+&sdmmc_cmd {
+	bootph-all;
+};
+
+&sdmmc_det {
+	bootph-all;
+};
+
 &sdhci {
 	cap-mmc-highspeed;
 	mmc-ddr-1_8v;
-- 
2.34.1

[PATCH v4 2/2] configs: rockchip: rock5b-rk3588: add pinctrl to SPL

[Eugen Hristev]

Add pinctrl driver in SPL. Do not remove pinctrl properties for SPL dtb.

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
---
Changes in v4:
- rebased on master: Warning ! This is rebased on top of the USB 2.0 series !
Changes in v2,v3:
- no change

 configs/rock5b-rk3588_defconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
index 8a3d356f729e..95271c312c51 100644
--- a/configs/rock5b-rk3588_defconfig
+++ b/configs/rock5b-rk3588_defconfig
@@ -47,7 +47,7 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_DOS_PARTITION is not set
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SPL_SYSCON=y
@@ -65,6 +65,7 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
-- 
2.34.1

Re: [PATCH v4 2/2] configs: rockchip: rock5b-rk3588: add pinctrl to SPL

[Kever Yang]

On 2023/5/15 21:44, Eugen Hristev wrote:
> Add pinctrl driver in SPL. Do not remove pinctrl properties for SPL dtb.
>
> Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
> Changes in v4:
> - rebased on master: Warning ! This is rebased on top of the USB 2.0 series !
> Changes in v2,v3:
> - no change
>
>   configs/rock5b-rk3588_defconfig | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
> index 8a3d356f729e..95271c312c51 100644
> --- a/configs/rock5b-rk3588_defconfig
> +++ b/configs/rock5b-rk3588_defconfig
> @@ -47,7 +47,7 @@ CONFIG_CMD_REGULATOR=y
>   # CONFIG_SPL_DOS_PARTITION is not set
>   CONFIG_SPL_OF_CONTROL=y
>   CONFIG_OF_LIVE=y
> -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
>   CONFIG_NET_RANDOM_ETHADDR=y
>   CONFIG_SPL_REGMAP=y
>   CONFIG_SPL_SYSCON=y
> @@ -65,6 +65,7 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
>   CONFIG_ETH_DESIGNWARE=y
>   CONFIG_GMAC_ROCKCHIP=y
>   CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> +CONFIG_SPL_PINCTRL=y
>   CONFIG_REGULATOR_PWM=y
>   CONFIG_DM_REGULATOR_FIXED=y
>   CONFIG_PWM_ROCKCHIP=y

Re: [PATCH v4 1/2] ARM: dts: rk3588-rock-5b-u-boot: add bootph-all to pinctrl for sdmmc

[Kever Yang]

On 2023/5/15 21:44, Eugen Hristev wrote:
> To be able to initialize the pinctrl correctly at SPL level and read
> u-boot proper from SD-Card, the pinctrl must be initialized.
>
> Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
> Changes in v4:
> - rebased on latest master: This is also on top of the USB 2.0 series !
> Changes in v3:
> - change to bootph-all props.
>
> Changes in v2:
> - add u-boot,dm-spl to pull up nodes, to also setup the pull control
> correctly. Also, in the loop that initializes multiple pins, only the
> first will be muxed as the loop will break when the pull up node is not
> found.
>
>   arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 26 +++++++++++++++++++++++++
>   1 file changed, 26 insertions(+)
>
> diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> index 53d029c60e8f..e9fcb7b92eb3 100644
> --- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> @@ -31,6 +31,8 @@
>   };
>   
>   &pinctrl {
> +	bootph-all;
> +
>   	usb {
>   		vcc5v0_host_en: vcc5v0-host-en {
>   			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
> @@ -38,11 +40,35 @@
>   	};
>   };
>   
> +&pcfg_pull_up_drv_level_2 {
> +	bootph-all;
> +};
> +
> +&pcfg_pull_up {
> +	bootph-all;
> +};
> +
>   &sdmmc {
>   	bus-width = <4>;
>   	status = "okay";
>   };
>   
> +&sdmmc_bus4 {
> +	bootph-all;
> +};
> +
> +&sdmmc_clk {
> +	bootph-all;
> +};
> +
> +&sdmmc_cmd {
> +	bootph-all;
> +};
> +
> +&sdmmc_det {
> +	bootph-all;
> +};
> +
>   &sdhci {
>   	cap-mmc-highspeed;
>   	mmc-ddr-1_8v;