From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B1ABBEB64D7 for ; Tue, 20 Jun 2023 18:17:19 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id CD39185A66; Tue, 20 Jun 2023 20:17:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="POH2STiu"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 5C96785F9F; Tue, 20 Jun 2023 20:17:16 +0200 (CEST) Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 370E78468A for ; Tue, 20 Jun 2023 20:17:13 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nm@ti.com Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 35KIHATo085180; Tue, 20 Jun 2023 13:17:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1687285031; bh=btEEXDrwImY5EoAhoGfNTzYXK0xf8Ez9JEZTwVGRn8M=; h=From:To:CC:Subject:Date; b=POH2STiuNVArlgFqOrNN/LJsKqXMEfrB6Ibpt8eUdCudZWkgp7zJ5TgbgzPC9n1E0 jz88TkjRr3MMIufCrLQisv6SK4dn9Lr15KQQ4Vfof5ihVuS55NgiB7fmfjHuYGBbxQ Cq66dDAlqXgLnBwe1npEnIuKzU2GTOPkUzeeEYhw= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 35KIHAV5041594 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 20 Jun 2023 13:17:10 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 20 Jun 2023 13:17:10 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 20 Jun 2023 13:17:10 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 35KIHAxZ017090; Tue, 20 Jun 2023 13:17:10 -0500 From: Nishanth Menon To: Tom Rini , Vignesh Raghavendra , CC: , , Nishanth Menon Subject: [PATCH] mailbox: k3-sec-proxy: Fill non-message tx data fields with 0x0 Date: Tue, 20 Jun 2023 13:17:09 -0500 Message-ID: <20230620181709.38058-1-nm@ti.com> X-Mailer: git-send-email 2.40.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Sec proxy data buffer is 60 bytes with the last of the registers indicating transmission completion. This however poses a bit of a challenge. The backing memory for sec_proxy is regular memory, and all sec proxy does is to trigger a burst of all 60 bytes of data over to the target thread backing ring accelerator. It doesn't do a memory scrub when it moves data out in the burst. When we transmit multiple messages, remnants of previous message is also transmitted which results in some random data being set in TISCI fields of messages that have been expanded forward. The entire concept of backward compatibility hinges on the fact that the unused message fields remain 0x0 allowing for 0x0 value to be specially considered when backward compatibility of message extension is done. So, instead of just writing the completion register, we continue to fill the message buffer up with 0x0 (note: for partial message involving completion, we already do this). This allows us to scale and introduce ABI changes back also work with other boot stages that may have left data in the internal memory. While at this, drop the unused accessor function. Fixes: f9aa41023bd9 ("mailbox: Introduce K3 Secure Proxy Driver") Signed-off-by: Nishanth Menon --- drivers/mailbox/k3-sec-proxy.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/mailbox/k3-sec-proxy.c b/drivers/mailbox/k3-sec-proxy.c index a862e55bc391..815808498f2e 100644 --- a/drivers/mailbox/k3-sec-proxy.c +++ b/drivers/mailbox/k3-sec-proxy.c @@ -94,11 +94,6 @@ static inline u32 sp_readl(void __iomem *addr, unsigned int offset) return readl(addr + offset); } -static inline void sp_writel(void __iomem *addr, unsigned int offset, u32 data) -{ - writel(data, addr + offset); -} - /** * k3_sec_proxy_of_xlate() - Translation of phandle to channel * @chan: Mailbox channel @@ -241,15 +236,20 @@ static int k3_sec_proxy_send(struct mbox_chan *chan, const void *data) /* Ensure all unused data is 0 */ data_trail &= 0xFFFFFFFF >> (8 * (sizeof(u32) - trail_bytes)); writel(data_trail, data_reg); - data_reg++; + data_reg += sizeof(u32); } /* * 'data_reg' indicates next register to write. If we did not already * write on tx complete reg(last reg), we must do so for transmit + * In addition, we also need to make sure all intermediate data + * registers(if any required), are reset to 0 for TISCI backward + * compatibility to be maintained. */ - if (data_reg <= (spt->data + spm->desc->data_end_offset)) - sp_writel(spt->data, spm->desc->data_end_offset, 0); + while (data_reg <= (spt->data + spm->desc->data_end_offset)) { + writel(0x0, data_reg); + data_reg += sizeof(u32); + } debug("%s: Message successfully sent on thread %ld\n", __func__, chan->id); -- 2.40.0