From: Hal Feng <hal.feng@starfivetech.com>
To: Lukasz Majewski <lukma@denx.de>,
Sean Anderson <seanga2@gmail.com>,
"Rick Chen" <rick@andestech.com>, Leo <ycliang@andestech.com>,
Torsten Duwe <duwe@lst.de>, Conor Dooley <conor@kernel.org>,
Yanhong Wang <yanhong.wang@starfivetech.com>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Xingyu Wu <xingyu.wu@starfivetech.com>,
Hal Feng <hal.feng@starfivetech.com>
Cc: <u-boot@lists.denx.de>
Subject: [PATCH v1 0/5] Make the clock dt-bindings and DT nodes consistent with Linux
Date: Fri, 7 Jul 2023 18:50:06 +0800 [thread overview]
Message-ID: <20230707105011.129241-1-hal.feng@starfivetech.com> (raw)
The clock dt-bindings and DT nodes are not consistent with Linux now.
Let's sync them with Linux, so the same dtb can work for Linux & U-Boot.
To achieve this goal, the PLL clock driver is separated and some clock
IDs conversion is needed in clock drivers.
For the motivation, please see the discussion in the link below.
[1] https://patchwork.kernel.org/project/linux-riscv/patch/20230512022036.97987-2-xingyu.wu@starfivetech.com/
Xingyu Wu (5):
clk: starfive: jh7110: Separate the PLL driver
riscv: dts: jh7110: Add PLL clock controller node
riscv: dts: jh7110: Add clock source from PLL
dt-bindings: clock: jh7110: Modify clock id to be same with Linux
clk: starfive: jh7110: Add of_xlate ops and macros for clock id
conversion
.../dts/jh7110-starfive-visionfive-2.dtsi | 6 +-
arch/riscv/dts/jh7110-u-boot.dtsi | 1 -
arch/riscv/dts/jh7110.dtsi | 16 +-
drivers/clk/starfive/clk-jh7110-pll.c | 103 +++++-
drivers/clk/starfive/clk-jh7110.c | 306 +++++++++++-------
drivers/clk/starfive/clk.h | 58 +---
.../dt-bindings/clock/starfive,jh7110-crg.h | 101 +++---
7 files changed, 365 insertions(+), 226 deletions(-)
base-commit: e1bebc16e1d9aa0ddd56c53c0b781f7186dce557
--
2.38.1
next reply other threads:[~2023-07-07 12:27 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-07 10:50 Hal Feng [this message]
2023-07-07 10:50 ` [PATCH v1 1/5] clk: starfive: jh7110: Separate the PLL driver Hal Feng
2023-07-24 5:14 ` Leo Liang
2023-07-07 10:50 ` [PATCH v1 2/5] riscv: dts: jh7110: Add PLL clock controller node Hal Feng
2023-07-24 5:15 ` Leo Liang
2023-07-07 10:50 ` [PATCH v1 3/5] riscv: dts: jh7110: Add clock source from PLL Hal Feng
2023-07-24 5:15 ` Leo Liang
2023-07-07 10:50 ` [PATCH v1 4/5] dt-bindings: clock: jh7110: Modify clock id to be same with Linux Hal Feng
2023-07-24 5:15 ` Leo Liang
2023-07-07 10:50 ` [PATCH v1 5/5] clk: starfive: jh7110: Add of_xlate ops and macros for clock id conversion Hal Feng
2023-07-24 5:16 ` Leo Liang
2023-07-11 9:09 ` [PATCH v1 0/5] Make the clock dt-bindings and DT nodes consistent with Linux Torsten Duwe
2023-07-12 7:13 ` Hal Feng
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