* [PATCH v2 1/4] net: ti: am65-cpsw-nuss: Use approved property to get efuse address
2023-07-22 19:31 [PATCH v2 0/4] net: ti: am65-cpsw-nuss: Drop custom properties Roger Quadros
@ 2023-07-22 19:31 ` Roger Quadros
2023-07-27 8:02 ` Nishanth Menon
2023-07-28 16:49 ` Tom Rini
2023-07-22 19:31 ` [PATCH v2 2/4] net: ti: am65-cpsw-nuss: Get port mode register from standard "phys" property Roger Quadros
` (4 subsequent siblings)
5 siblings, 2 replies; 11+ messages in thread
From: Roger Quadros @ 2023-07-22 19:31 UTC (permalink / raw)
To: joe.hershberger, nm
Cc: rfried.dev, r-gunasekaran, s-vadapalli, mripard, sjg, pbrobinson,
srk, u-boot, Roger Quadros
The approved DT property for MAC efuse (ROM) address is
"ti,syscon-efuse".
Use that and drop custom property "mac_efuse".
Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
drivers/net/ti/Kconfig | 1 +
drivers/net/ti/am65-cpsw-nuss.c | 52 +++++++++++++++++++++++----------
2 files changed, 37 insertions(+), 16 deletions(-)
diff --git a/drivers/net/ti/Kconfig b/drivers/net/ti/Kconfig
index e13dbc9401..d9f1c019a8 100644
--- a/drivers/net/ti/Kconfig
+++ b/drivers/net/ti/Kconfig
@@ -43,6 +43,7 @@ config TI_AM65_CPSW_NUSS
depends on ARCH_K3
imply MISC_INIT_R
imply MISC
+ imply SYSCON
select PHYLIB
help
This driver supports TI K3 MCU CPSW Nuss Ethernet controller
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 523a4c9f91..ee46676ec8 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -21,7 +21,9 @@
#include <net.h>
#include <phy.h>
#include <power-domain.h>
+#include <regmap.h>
#include <soc.h>
+#include <syscon.h>
#include <linux/bitops.h>
#include <linux/soc/ti/ti-udma.h>
@@ -101,7 +103,6 @@ struct am65_cpsw_common {
fdt_addr_t mdio_base;
fdt_addr_t ale_base;
fdt_addr_t gmii_sel;
- fdt_addr_t mac_efuse;
struct clk fclk;
struct power_domain pwrdmn;
@@ -516,24 +517,45 @@ static void am65_cpsw_stop(struct udevice *dev)
common->started = false;
}
+static int am65_cpsw_am654_get_efuse_macid(struct udevice *dev,
+ int slave, u8 *mac_addr)
+{
+ u32 mac_lo, mac_hi, offset;
+ struct regmap *syscon;
+ int ret;
+
+ syscon = syscon_regmap_lookup_by_phandle(dev, "ti,syscon-efuse");
+ if (IS_ERR(syscon)) {
+ if (PTR_ERR(syscon) == -ENODEV)
+ return 0;
+ return PTR_ERR(syscon);
+ }
+
+ ret = dev_read_u32_index(dev, "ti,syscon-efuse", 1, &offset);
+ if (ret)
+ return ret;
+
+ regmap_read(syscon, offset, &mac_lo);
+ regmap_read(syscon, offset + 4, &mac_hi);
+
+ mac_addr[0] = (mac_hi >> 8) & 0xff;
+ mac_addr[1] = mac_hi & 0xff;
+ mac_addr[2] = (mac_lo >> 24) & 0xff;
+ mac_addr[3] = (mac_lo >> 16) & 0xff;
+ mac_addr[4] = (mac_lo >> 8) & 0xff;
+ mac_addr[5] = mac_lo & 0xff;
+
+ return 0;
+}
+
static int am65_cpsw_read_rom_hwaddr(struct udevice *dev)
{
struct am65_cpsw_priv *priv = dev_get_priv(dev);
- struct am65_cpsw_common *common = priv->cpsw_common;
struct eth_pdata *pdata = dev_get_plat(dev);
- u32 mac_hi, mac_lo;
-
- if (common->mac_efuse == FDT_ADDR_T_NONE)
- return -1;
- mac_lo = readl(common->mac_efuse);
- mac_hi = readl(common->mac_efuse + 4);
- pdata->enetaddr[0] = (mac_hi >> 8) & 0xff;
- pdata->enetaddr[1] = mac_hi & 0xff;
- pdata->enetaddr[2] = (mac_lo >> 24) & 0xff;
- pdata->enetaddr[3] = (mac_lo >> 16) & 0xff;
- pdata->enetaddr[4] = (mac_lo >> 8) & 0xff;
- pdata->enetaddr[5] = mac_lo & 0xff;
+ am65_cpsw_am654_get_efuse_macid(dev,
+ priv->port_id,
+ pdata->enetaddr);
return 0;
}
@@ -710,8 +732,6 @@ static int am65_cpsw_probe_nuss(struct udevice *dev)
cpsw_common->ss_base = dev_read_addr(dev);
if (cpsw_common->ss_base == FDT_ADDR_T_NONE)
return -EINVAL;
- cpsw_common->mac_efuse = devfdt_get_addr_name(dev, "mac_efuse");
- /* no err check - optional */
ret = power_domain_get_by_index(dev, &cpsw_common->pwrdmn, 0);
if (ret) {
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v2 1/4] net: ti: am65-cpsw-nuss: Use approved property to get efuse address
2023-07-22 19:31 ` [PATCH v2 1/4] net: ti: am65-cpsw-nuss: Use approved property to get efuse address Roger Quadros
@ 2023-07-27 8:02 ` Nishanth Menon
2023-07-28 16:49 ` Tom Rini
1 sibling, 0 replies; 11+ messages in thread
From: Nishanth Menon @ 2023-07-27 8:02 UTC (permalink / raw)
To: Roger Quadros
Cc: joe.hershberger, rfried.dev, r-gunasekaran, s-vadapalli, mripard,
sjg, pbrobinson, srk, u-boot
On 22:31-20230722, Roger Quadros wrote:
> The approved DT property for MAC efuse (ROM) address is
> "ti,syscon-efuse".
>
> Use that and drop custom property "mac_efuse".
>
> Signed-off-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Nishanth Menon <nm@ti.com>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/4] net: ti: am65-cpsw-nuss: Use approved property to get efuse address
2023-07-22 19:31 ` [PATCH v2 1/4] net: ti: am65-cpsw-nuss: Use approved property to get efuse address Roger Quadros
2023-07-27 8:02 ` Nishanth Menon
@ 2023-07-28 16:49 ` Tom Rini
1 sibling, 0 replies; 11+ messages in thread
From: Tom Rini @ 2023-07-28 16:49 UTC (permalink / raw)
To: Roger Quadros
Cc: joe.hershberger, nm, rfried.dev, r-gunasekaran, s-vadapalli,
mripard, sjg, pbrobinson, srk, u-boot
[-- Attachment #1: Type: text/plain, Size: 346 bytes --]
On Sat, Jul 22, 2023 at 10:31:48PM +0300, Roger Quadros wrote:
> The approved DT property for MAC efuse (ROM) address is
> "ti,syscon-efuse".
>
> Use that and drop custom property "mac_efuse".
>
> Signed-off-by: Roger Quadros <rogerq@kernel.org>
> Acked-by: Nishanth Menon <nm@ti.com>
Applied to u-boot/master, thanks!
--
Tom
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 2/4] net: ti: am65-cpsw-nuss: Get port mode register from standard "phys" property
2023-07-22 19:31 [PATCH v2 0/4] net: ti: am65-cpsw-nuss: Drop custom properties Roger Quadros
2023-07-22 19:31 ` [PATCH v2 1/4] net: ti: am65-cpsw-nuss: Use approved property to get efuse address Roger Quadros
@ 2023-07-22 19:31 ` Roger Quadros
2023-07-27 8:02 ` Nishanth Menon
2023-07-28 16:49 ` Tom Rini
2023-07-22 19:31 ` [RFC PATCH v2 3/4] arm: dts: k3-am625-sk-u-boot.dtsi: drop mac_efuse Roger Quadros
` (3 subsequent siblings)
5 siblings, 2 replies; 11+ messages in thread
From: Roger Quadros @ 2023-07-22 19:31 UTC (permalink / raw)
To: joe.hershberger, nm
Cc: rfried.dev, r-gunasekaran, s-vadapalli, mripard, sjg, pbrobinson,
srk, u-boot, Roger Quadros
Approved DT binding has the port mode register in the
"phys" property. Get it from there instead of the custom
"cpsw-phy-sel" property.
This will allow us to keep DT in sync with Linux.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
drivers/net/ti/am65-cpsw-nuss.c | 63 +++++++++++++++++++--------------
1 file changed, 37 insertions(+), 26 deletions(-)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index ee46676ec8..ce52106e52 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -102,7 +102,6 @@ struct am65_cpsw_common {
fdt_addr_t cpsw_base;
fdt_addr_t mdio_base;
fdt_addr_t ale_base;
- fdt_addr_t gmii_sel;
struct clk fclk;
struct power_domain pwrdmn;
@@ -232,18 +231,37 @@ out:
#define AM65_GMII_SEL_RGMII_IDMODE BIT(4)
-static void am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv,
- phy_interface_t phy_mode, int slave)
+static int am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv,
+ phy_interface_t phy_mode)
{
- struct am65_cpsw_common *common = priv->cpsw_common;
- fdt_addr_t gmii_sel = common->gmii_sel + AM65_GMII_SEL_PORT_OFFS(slave);
- u32 reg;
- u32 mode = 0;
+ struct udevice *dev = priv->dev;
+ u32 offset, reg, phandle;
bool rgmii_id = false;
+ fdt_addr_t gmii_sel;
+ u32 mode = 0;
+ ofnode node;
+ int ret;
+
+ ret = ofnode_read_u32(dev_ofnode(dev), "phys", &phandle);
+ if (ret)
+ return ret;
+
+ ret = ofnode_read_u32_index(dev_ofnode(dev), "phys", 1, &offset);
+ if (ret)
+ return ret;
+
+ node = ofnode_get_by_phandle(phandle);
+ if (!ofnode_valid(node))
+ return -ENODEV;
+
+ gmii_sel = ofnode_get_addr(node);
+ if (gmii_sel == FDT_ADDR_T_NONE)
+ return -ENODEV;
+ gmii_sel += AM65_GMII_SEL_PORT_OFFS(offset);
reg = readl(gmii_sel);
- dev_dbg(common->dev, "old gmii_sel: %08x\n", reg);
+ dev_dbg(dev, "old gmii_sel: %08x\n", reg);
switch (phy_mode) {
case PHY_INTERFACE_MODE_RMII:
@@ -262,7 +280,7 @@ static void am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv,
break;
default:
- dev_warn(common->dev,
+ dev_warn(dev,
"Unsupported PHY mode: %u. Defaulting to MII.\n",
phy_mode);
/* fallthrough */
@@ -275,15 +293,19 @@ static void am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv,
mode |= AM65_GMII_SEL_RGMII_IDMODE;
reg = mode;
- dev_dbg(common->dev, "gmii_sel PHY mode: %u, new gmii_sel: %08x\n",
+ dev_dbg(dev, "gmii_sel PHY mode: %u, new gmii_sel: %08x\n",
phy_mode, reg);
writel(reg, gmii_sel);
reg = readl(gmii_sel);
- if (reg != mode)
- dev_err(common->dev,
+ if (reg != mode) {
+ dev_err(dev,
"gmii_sel PHY mode NOT SET!: requested: %08x, gmii_sel: %08x\n",
mode, reg);
+ return 0;
+ }
+
+ return 0;
}
static int am65_cpsw_start(struct udevice *dev)
@@ -708,7 +730,9 @@ static int am65_cpsw_port_probe(struct udevice *dev)
if (ret)
goto out;
- am65_cpsw_gmii_sel_k3(priv, pdata->phy_interface, priv->port_id);
+ ret = am65_cpsw_gmii_sel_k3(priv, pdata->phy_interface);
+ if (ret)
+ goto out;
ret = am65_cpsw_mdio_init(dev);
if (ret)
@@ -803,19 +827,6 @@ static int am65_cpsw_probe_nuss(struct udevice *dev)
AM65_CPSW_CPSW_NU_PORT_MACSL_OFFSET;
}
- node = dev_read_subnode(dev, "cpsw-phy-sel");
- if (!ofnode_valid(node)) {
- dev_err(dev, "can't find cpsw-phy-sel\n");
- ret = -ENOENT;
- goto out;
- }
-
- cpsw_common->gmii_sel = ofnode_get_addr(node);
- if (cpsw_common->gmii_sel == FDT_ADDR_T_NONE) {
- dev_err(dev, "failed to get gmii_sel base\n");
- goto out;
- }
-
cpsw_common->bus_freq =
dev_read_u32_default(dev, "bus_freq",
AM65_CPSW_MDIO_BUS_FREQ_DEF);
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v2 2/4] net: ti: am65-cpsw-nuss: Get port mode register from standard "phys" property
2023-07-22 19:31 ` [PATCH v2 2/4] net: ti: am65-cpsw-nuss: Get port mode register from standard "phys" property Roger Quadros
@ 2023-07-27 8:02 ` Nishanth Menon
2023-07-28 16:49 ` Tom Rini
1 sibling, 0 replies; 11+ messages in thread
From: Nishanth Menon @ 2023-07-27 8:02 UTC (permalink / raw)
To: Roger Quadros
Cc: joe.hershberger, rfried.dev, r-gunasekaran, s-vadapalli, mripard,
sjg, pbrobinson, srk, u-boot
On 22:31-20230722, Roger Quadros wrote:
> Approved DT binding has the port mode register in the
> "phys" property. Get it from there instead of the custom
> "cpsw-phy-sel" property.
>
> This will allow us to keep DT in sync with Linux.
>
> Signed-off-by: Roger Quadros <rogerq@kernel.org>
> ---
Acked-by: Nishanth Menon <nm@ti.com>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 2/4] net: ti: am65-cpsw-nuss: Get port mode register from standard "phys" property
2023-07-22 19:31 ` [PATCH v2 2/4] net: ti: am65-cpsw-nuss: Get port mode register from standard "phys" property Roger Quadros
2023-07-27 8:02 ` Nishanth Menon
@ 2023-07-28 16:49 ` Tom Rini
1 sibling, 0 replies; 11+ messages in thread
From: Tom Rini @ 2023-07-28 16:49 UTC (permalink / raw)
To: Roger Quadros
Cc: joe.hershberger, nm, rfried.dev, r-gunasekaran, s-vadapalli,
mripard, sjg, pbrobinson, srk, u-boot
[-- Attachment #1: Type: text/plain, Size: 413 bytes --]
On Sat, Jul 22, 2023 at 10:31:49PM +0300, Roger Quadros wrote:
> Approved DT binding has the port mode register in the
> "phys" property. Get it from there instead of the custom
> "cpsw-phy-sel" property.
>
> This will allow us to keep DT in sync with Linux.
>
> Signed-off-by: Roger Quadros <rogerq@kernel.org>
> Acked-by: Nishanth Menon <nm@ti.com>
Applied to u-boot/master, thanks!
--
Tom
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 659 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* [RFC PATCH v2 3/4] arm: dts: k3-am625-sk-u-boot.dtsi: drop mac_efuse
2023-07-22 19:31 [PATCH v2 0/4] net: ti: am65-cpsw-nuss: Drop custom properties Roger Quadros
2023-07-22 19:31 ` [PATCH v2 1/4] net: ti: am65-cpsw-nuss: Use approved property to get efuse address Roger Quadros
2023-07-22 19:31 ` [PATCH v2 2/4] net: ti: am65-cpsw-nuss: Get port mode register from standard "phys" property Roger Quadros
@ 2023-07-22 19:31 ` Roger Quadros
2023-07-22 19:31 ` [RFC PATCH v2 4/4] arm: dts: k3-am625-sk-u-boot.dtsi: drop cpsw-phy-sel property Roger Quadros
` (2 subsequent siblings)
5 siblings, 0 replies; 11+ messages in thread
From: Roger Quadros @ 2023-07-22 19:31 UTC (permalink / raw)
To: joe.hershberger, nm
Cc: rfried.dev, r-gunasekaran, s-vadapalli, mripard, sjg, pbrobinson,
srk, u-boot, Roger Quadros
This was a custom property and we don't need it anymore.
We are now using the standard property "ti,syscon-efuse".
Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index 249155733a..54fdabdb8e 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -128,9 +128,6 @@
};
&cpsw3g {
- reg = <0x0 0x8000000 0x0 0x200000>,
- <0x0 0x43000200 0x0 0x8>;
- reg-names = "cpsw_nuss", "mac_efuse";
/delete-property/ ranges;
bootph-pre-ram;
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [RFC PATCH v2 4/4] arm: dts: k3-am625-sk-u-boot.dtsi: drop cpsw-phy-sel property
2023-07-22 19:31 [PATCH v2 0/4] net: ti: am65-cpsw-nuss: Drop custom properties Roger Quadros
` (2 preceding siblings ...)
2023-07-22 19:31 ` [RFC PATCH v2 3/4] arm: dts: k3-am625-sk-u-boot.dtsi: drop mac_efuse Roger Quadros
@ 2023-07-22 19:31 ` Roger Quadros
2023-07-24 8:29 ` [PATCH v2 0/4] net: ti: am65-cpsw-nuss: Drop custom properties Maxime Ripard
2023-07-28 12:58 ` Marcel Ziswiler
5 siblings, 0 replies; 11+ messages in thread
From: Roger Quadros @ 2023-07-22 19:31 UTC (permalink / raw)
To: joe.hershberger, nm
Cc: rfried.dev, r-gunasekaran, s-vadapalli, mripard, sjg, pbrobinson,
srk, u-boot, Roger Quadros
This was a custom property and we don't need it anymore.
We are now using the standard property "phys" to get the
PHY port control register.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 7 -------
1 file changed, 7 deletions(-)
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index 54fdabdb8e..d33c2fca3d 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -128,14 +128,7 @@
};
&cpsw3g {
- /delete-property/ ranges;
bootph-pre-ram;
-
- cpsw-phy-sel@04044 {
- compatible = "ti,am64-phy-gmii-sel";
- reg = <0x0 0x00104044 0x0 0x8>;
- bootph-pre-ram;
- };
};
&cpsw_port1 {
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v2 0/4] net: ti: am65-cpsw-nuss: Drop custom properties
2023-07-22 19:31 [PATCH v2 0/4] net: ti: am65-cpsw-nuss: Drop custom properties Roger Quadros
` (3 preceding siblings ...)
2023-07-22 19:31 ` [RFC PATCH v2 4/4] arm: dts: k3-am625-sk-u-boot.dtsi: drop cpsw-phy-sel property Roger Quadros
@ 2023-07-24 8:29 ` Maxime Ripard
2023-07-28 12:58 ` Marcel Ziswiler
5 siblings, 0 replies; 11+ messages in thread
From: Maxime Ripard @ 2023-07-24 8:29 UTC (permalink / raw)
To: Roger Quadros
Cc: joe.hershberger, nm, rfried.dev, r-gunasekaran, s-vadapalli, sjg,
pbrobinson, srk, u-boot
[-- Attachment #1: Type: text/plain, Size: 526 bytes --]
Hi,
On Sat, Jul 22, 2023 at 10:31:47PM +0300, Roger Quadros wrote:
> This series gets rid of 2 custom properties (mac_efuse and cpsw-phy-sel)
> that were used in u-boot for the cpsw3g node.
>
> This makes it easier for us to have u-boot DT in sync with Linux.
>
> Last 2 patches are RFC so they can come separately. i.e. squashed with
> DT cleanup series from Nishanth.
Thanks for cleaning this up, hopefully it will solve our ranges
conversation :)
Tested-by: Maxime Ripard <mripard@kernel.org>
Maxime
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^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH v2 0/4] net: ti: am65-cpsw-nuss: Drop custom properties
2023-07-22 19:31 [PATCH v2 0/4] net: ti: am65-cpsw-nuss: Drop custom properties Roger Quadros
` (4 preceding siblings ...)
2023-07-24 8:29 ` [PATCH v2 0/4] net: ti: am65-cpsw-nuss: Drop custom properties Maxime Ripard
@ 2023-07-28 12:58 ` Marcel Ziswiler
5 siblings, 0 replies; 11+ messages in thread
From: Marcel Ziswiler @ 2023-07-28 12:58 UTC (permalink / raw)
To: rogerq@kernel.org, nm@ti.com, joe.hershberger@ni.com
Cc: s-vadapalli@ti.com, r-gunasekaran@ti.com, srk@ti.com,
rfried.dev@gmail.com, pbrobinson@gmail.com, sjg@chromium.org,
u-boot@lists.denx.de, mripard@kernel.org
Hi Roger
On Sat, 2023-07-22 at 22:31 +0300, Roger Quadros wrote:
> Hi,
>
> This series gets rid of 2 custom properties (mac_efuse and cpsw-phy-sel)
> that were used in u-boot for the cpsw3g node.
>
> This makes it easier for us to have u-boot DT in sync with Linux.
>
> Last 2 patches are RFC so they can come separately. i.e. squashed with
> DT cleanup series from Nishanth.
>
> cheers,
> -roger
>
> Changelog:
> v2:
> - drop enabling CONFIG_SYSCON from defconfig. Use imply in Kconfig instead.
> - add patch to drop cpsw-phy-sel custom DT property.
>
> Roger Quadros (4):
> net: ti: am65-cpsw-nuss: Use approved property to get efuse address
> net: ti: am65-cpsw-nuss: Get port mode register from standard "phys"
> property
> arm: dts: k3-am625-sk-u-boot.dtsi: drop mac_efuse
> arm: dts: k3-am625-sk-u-boot.dtsi: drop cpsw-phy-sel property
>
> arch/arm/dts/k3-am625-sk-u-boot.dtsi | 10 ---
> drivers/net/ti/Kconfig | 1 +
> drivers/net/ti/am65-cpsw-nuss.c | 115 +++++++++++++++++----------
> 3 files changed, 74 insertions(+), 52 deletions(-)
This also works with our in-flight stuff [1] with the same adjustments which we will shortly send as a v4.
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
[1] https://lore.kernel.org/all/20230715074050.941051-1-marcel@ziswiler.com
Cheers
Marcel
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