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[2603:6081:7b00:6400:b236:e3a5:57be:379d]) by smtp.gmail.com with ESMTPSA id a18-20020ab00812000000b0078f3505242asm1862725uaf.19.2023.07.25.14.42.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jul 2023 14:42:12 -0700 (PDT) Date: Tue, 25 Jul 2023 17:42:10 -0400 From: Tom Rini To: Nishanth Menon Cc: Neha Malcom Francis , Bryan Brattlof , Praneeth Bajjuri , Andrew Davis , Robert Nelson , Vignesh R , u-boot@lists.denx.de Subject: Re: [PATCH 3/6] board: ti: am62x: Add basic initialization for usb voltage, 32k crystal, debounce Message-ID: <20230725214210.GL3630934@bill-the-cat> References: <20230725185253.2123433-1-nm@ti.com> <20230725185253.2123433-4-nm@ti.com> <20230725212504.GH3630934@bill-the-cat> <20230725213755.kc6qcvmkmt2yzzqz@perfected> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="apo0oRJ/DdxcieSU" Content-Disposition: inline In-Reply-To: <20230725213755.kc6qcvmkmt2yzzqz@perfected> X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean --apo0oRJ/DdxcieSU Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Jul 25, 2023 at 04:37:55PM -0500, Nishanth Menon wrote: > On 17:25-20230725, Tom Rini wrote: > > On Tue, Jul 25, 2023 at 01:52:50PM -0500, Nishanth Menon wrote: > [..] >=20 > > > + /* Set USB0 PHY core voltage to 0.85V */ > > > + val =3D readl(CTRLMMR_USB0_PHY_CTRL); > > > + val &=3D ~(CORE_VOLTAGE); > > > + writel(val, CTRLMMR_USB0_PHY_CTRL); > > > + > > > + /* Set USB1 PHY core voltage to 0.85V */ > > > + val =3D readl(CTRLMMR_USB1_PHY_CTRL); > > > + val &=3D ~(CORE_VOLTAGE); > > > + writel(val, CTRLMMR_USB1_PHY_CTRL); > > > + > > > + /* We have 32k crystal, so lets enable it */ > > > + val =3D readl(MCU_CTRL_LFXOSC_CTRL); > > > + val &=3D ~(MCU_CTRL_LFXOSC_32K_DISABLE_VAL); > > > + writel(val, MCU_CTRL_LFXOSC_CTRL); > > > + /* Add any TRIM needed for the crystal here.. */ > > > + /* Make sure to mux up to take the SoC 32k from the crystal */ > > > + writel(MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL, > > > + MCU_CTRL_DEVICE_CLKOUT_32K_CTRL); > > > + > > > + /* Setup debounce conf registers - arbitrary values. Times are appr= ox */ > > > + /* 1.9ms debounce @ 32k */ > > > + writel(WKUP_CTRLMMR_DBOUNCE_CFG1, 0x1); > > > + /* 5ms debounce @ 32k */ > > > + writel(WKUP_CTRLMMR_DBOUNCE_CFG2, 0x5); > > > + /* 20ms debounce @ 32k */ > > > + writel(WKUP_CTRLMMR_DBOUNCE_CFG3, 0x14); > > > + /* 46ms debounce @ 32k */ > > > + writel(WKUP_CTRLMMR_DBOUNCE_CFG4, 0x18); > > > + /* 100ms debounce @ 32k */ > > > + writel(WKUP_CTRLMMR_DBOUNCE_CFG5, 0x1c); > > > + /* 156ms debounce @ 32k */ > > > + writel(WKUP_CTRLMMR_DBOUNCE_CFG6, 0x1f); > > > + > > > video_setup(); > > > enable_caches(); > > > if (IS_ENABLED(CONFIG_SPL_SPLASH_SCREEN) && IS_ENABLED(CONFIG_SPL_B= MP)) > >=20 > > Here's a whole lot of seemingly board specific code in a function and > > file that's supposed to support any am62 platform. Is this really what > > we need, where we need it? >=20 > * without using the correct voltage for USB, we risk damaging the IOs - > board specific, sure. So what happens when we do this on the other EVM, does it have the same values? Is there some must-always-be-safe values? Or is the answer "we must do this board specific to be safe" and so need to re-think what can and can't be shared between board builds. > * 32k - without using the external 32k, 32k rc-osc comes into play, > which is accurate +-20% - board specific, sure OK.. > * Debounce configuration - I'd argue this is'nt board specific as it > sets up different timing configurations that can be customized, but > should be sufficient for the varied common usecases. So this is, or this can be re-worked to be always correct (or, correct enough for the circumstances and limitations) values? > That said, i can drop this patch from the series, but I am curious how > we'd handle this kind of stuff cleanly.. Well, we need to figure out how to handle this cleanly. --=20 Tom --apo0oRJ/DdxcieSU Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmTAQbIACgkQFHw5/5Y0 tyyKGAv/RzHfOefgPeDrRsUoVJvNc2k+Gw3cY9X3466dqQJ8g9ZVcYew1+I0dRxQ sGtYT1i74eWdfG++3vpGq9CHf+F0pbteJQFHJ4vgua1YM9A2LfUdN6J/RMJR0TzW ffa9fsTK1MklROHGY6Tp/+q+zv6JjF0iKOmqI/JRTtLUZ4kQd5l1yo2zaDWUVeHM aGwY4HPeBA7cy1md18rIiK9l4t3nGNaV+3F1Uq5Ftq3+QwwpWufuXYwZHMY/h9k1 +X4u8chnkUAWOn6A7gt6oji0tpmn1YXIqBVb616RpKrLjd569xcKliG1KVQJNH+t dYmaEdDbnsfcjDsFVIMSW7ufY2anMN3OuKBpiZezJjbEq6ve4UvzjpvFu+1l3jUG KICDxmLxycU5z/ONug3OOqWtWXHh5N6Gv4OSu89SGsMQGvUZJDi5tpZYJv3fIXMO 6eLoEGqZW9GSzcbpdwPJ4jKgu2pHFXh29swqM2xwksZeeBxakVv7wt+W7hi+h8So BqzhvrL4 =wmg/ -----END PGP SIGNATURE----- --apo0oRJ/DdxcieSU--