From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9A9B0C001DF for ; Tue, 1 Aug 2023 12:37:11 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9C15C86802; Tue, 1 Aug 2023 14:37:09 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="hllS3WtP"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id BD18686B09; Tue, 1 Aug 2023 14:37:08 +0200 (CEST) Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 10C75867E2 for ; Tue, 1 Aug 2023 14:37:05 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=nm@ti.com Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 371Caxnf035811; Tue, 1 Aug 2023 07:36:59 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1690893419; bh=nTXgXcy7N8ZTeUe/p/xwlo5+aZFaijArNz4zrKoXCQw=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=hllS3WtPO2jkt54Xui401xvHM+d9lnG1SkbG49iYviKZq2HZSOPNl71zi35goK6cu w8aRpp2MpNhgOXP28+XaVZSFjdkeeeW4EJERZ0wejCqwpP1oAlCsWC4FMv5JBKXyN2 LJCAyVWPQs5H2NOaXCyq9SQOzdV8QosbO93q4rHM= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 371Caxf4050953 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 1 Aug 2023 07:36:59 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 1 Aug 2023 07:36:59 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 1 Aug 2023 07:36:59 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 371CawZK024644; Tue, 1 Aug 2023 07:36:59 -0500 Date: Tue, 1 Aug 2023 07:36:58 -0500 From: Nishanth Menon To: Roger Quadros CC: , , , , , Subject: Re: [PATCH v2 2/2] arm: dts: k3-am64: Sync DT with Linux v6.5-rc1 Message-ID: <20230801123658.buttvtxvkyc67ga3@handsfree> References: <20230731122737.36316-1-rogerq@kernel.org> <20230731122737.36316-3-rogerq@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20230731122737.36316-3-rogerq@kernel.org> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On 15:27-20230731, Roger Quadros wrote: > Sync all am642-evm/am642-sk related DT files > with Linux v6.5-rc1. > > - drop timer1 in favor of main_timer0 in am64-main.dtsi. > Need to delete clock & power domain properties of > main_timer1 in -r5.dts else won't boot. As we discussed in IRC, we should document the rationale > - drop cpsw3g custom DT property 'mac_efuse' and custom > DT node cpsw-phy-sel as driver picks these from standard > property/node. > > Signed-off-by: Roger Quadros > --- [...] > diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts > index b49064181a..fd9e9a6489 100644 > --- a/arch/arm/dts/k3-am642-r5-evm.dts > +++ b/arch/arm/dts/k3-am642-r5-evm.dts Same with the evm and sk dts files. > @@ -13,12 +13,17 @@ > / { > chosen { > stdout-path = "serial2:115200n8"; > - tick-timer = &timer1; > }; > > aliases { > remoteproc0 = &sysctrler; > remoteproc1 = &a53_0; > + serial1 = &main_uart1; > + serial2 = &main_uart0; > + i2c0 = &main_i2c0; > + mmc0 = &sdhci0; > + mmc1 = &sdhci1; > + ethernet0 = &cpsw_port1; Why do we need any of these? > }; > > memory@80000000 { We dont need this either. > @@ -210,6 +215,13 @@ > AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ > >; > }; > + > + main_i2c0_pins_default: main-i2c0-default-pins { > + pinctrl-single,pins = < > + AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ > + AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ > + >; > + }; we should drop all the pinmuxes - they come in from board.dts. > }; > > &dmsc { > @@ -227,6 +239,7 @@ > /delete-property/ clock-names; > pinctrl-names = "default"; > pinctrl-0 = <&main_uart0_pins_default>; > + current-speed = <115200>; > status = "okay"; > }; > > @@ -267,6 +280,10 @@ > > /* EEPROM might be read before SYSFW is available */ > &main_i2c0 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&main_i2c0_pins_default>; > + clock-frequency = <400000>; > /delete-property/ power-domains; > }; We should be inheriting stuff from board.dts. > > @@ -282,4 +299,11 @@ > pinctrl-0 = <&main_usb0_pins_default>; > }; > > +&main_timer0 { > + /delete-property/ clocks; > + /delete-property/ assigned-clocks; > + /delete-property/ assigned-clock-parents; > + /delete-property/ power-domains; This needs documentation. > +}; > + > #include "k3-am642-evm-u-boot.dtsi" > diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts > index 32d4c31728..5487973e6e 100644 > --- a/arch/arm/dts/k3-am642-r5-sk.dts > +++ b/arch/arm/dts/k3-am642-r5-sk.dts > @@ -15,12 +15,17 @@ > / { > chosen { > stdout-path = "serial2:115200n8"; > - tick-timer = &timer1; > }; > > aliases { > remoteproc0 = &sysctrler; > remoteproc1 = &a53_0; > + serial1 = &main_uart1; > + serial2 = &main_uart0; > + i2c0 = &main_i2c0; > + mmc1 = &sdhci1; > + ethernet0 = &cpsw_port1; > + ethernet1 = &cpsw_port2; > }; > > memory@80000000 { > @@ -178,6 +183,13 @@ > AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ > >; > }; > + > + main_i2c0_pins_default: main-i2c0-default-pins { > + pinctrl-single,pins = < > + AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ > + AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ > + >; > + }; > }; > > &dmsc { > @@ -189,12 +201,22 @@ > ti,secure-host; > }; > > +/* EEPROM might be read before SYSFW is available */ > +&main_i2c0 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&main_i2c0_pins_default>; > + clock-frequency = <400000>; > + /delete-property/ power-domains; > +}; > + > &main_uart0 { > /delete-property/ power-domains; > /delete-property/ clocks; > /delete-property/ clock-names; > pinctrl-names = "default"; > pinctrl-0 = <&main_uart0_pins_default>; > + current-speed = <115200>; > status = "okay"; > }; > > @@ -264,4 +286,11 @@ > }; > }; > > +&main_timer0 { > + /delete-property/ clocks; > + /delete-property/ assigned-clocks; > + /delete-property/ assigned-clock-parents; > + /delete-property/ power-domains; > +}; > + > #include "k3-am642-sk-u-boot.dtsi" Move the u-boot.dtsi include to the very top after board.dts is included. - Same with the evm dts. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D