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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id do25-20020a0566384c9900b0043a11ec6517sm2321702jab.171.2023.09.24.12.25.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 24 Sep 2023 12:25:56 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Tom Rini , Marek Vasut , Simon Glass , Ramon Fried , Simon Goldschmidt , Tien Fong Chee Subject: [PATCH v3 09/38] spl: Enable CONFIG_SPL_SYS_MALLOC_F where needed Date: Sun, 24 Sep 2023 13:24:54 -0600 Message-ID: <20230924192536.1812799-10-sjg@chromium.org> X-Mailer: git-send-email 2.42.0.515.g380fc7ccd1-goog In-Reply-To: <20230924192536.1812799-1-sjg@chromium.org> References: <20230924192536.1812799-1-sjg@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Enable CONFIG_SPL_SYS_MALLOC_F for boards which have a non-zero value for CONFIG_SPL_SYS_MALLOC_F_LEN Note that the default is yes in most cases, so no changes are needed to board defconfig options. Signed-off-by: Simon Glass --- Changes in v3: - Add new patch to enable CONFIG_SPL_SYS_MALLOC_F where needed arch/arm/mach-snapdragon/Kconfig | 3 +++ arch/arm/mach-socfpga/Kconfig | 3 +++ 2 files changed, 6 insertions(+) diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index 914f4d960534..0e073045be54 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -6,6 +6,9 @@ config SYS_SOC config SYS_MALLOC_F_LEN default 0x2000 +config SPL_SYS_MALLOC_F + default y + config SPL_SYS_MALLOC_F_LEN default 0x2000 diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 503c82d388ce..114d24381294 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -30,6 +30,9 @@ config SPL_SIZE_LIMIT_PROVIDE_STACK config SPL_STACK_R_ADDR default 0x00800000 if TARGET_SOCFPGA_GEN5 +config SPL_SYS_MALLOC_F + default y if TARGET_SOCFPGA_GEN5 + config SPL_SYS_MALLOC_F_LEN default 0x800 if TARGET_SOCFPGA_GEN5 -- 2.42.0.515.g380fc7ccd1-goog